Datasheet

 2010-2012 Microchip Technology Inc. DS41440C-page 173
PIC16(L)F1825/1829
TABLE 18-2: SUMMARY OF REGISTERS ASSOCIATED WITH SR LATCH MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA
— — —ANSA4— ANSA2 ANSA1 ANSA0
126
INLVLA
— — INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 127
INLVLC
INLVLC7
(1)
INLVLC6
(1)
INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 138
SRCON0 SRLEN SRCLK<2:0> SRQEN SRNQEN SRPS SRPR 171
SRCON1 SRSPE SRSCKE SRSC2E
(1)
SRSC1E SRRPE SRRCKE SRRC2E
(1)
SRRC1E 172
TRISA
— — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
125
TRISC
TRISC7
(1)
TRISC6
(1)
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
136
Legend: — Unimplemented, read as ‘0’. Shaded cells are unused by the SR latch module.
Note 1: PIC16(L)F1829 only.