Datasheet

PIC16(L)F1824/1828
DS41419D-page 38 2010-2012 Microchip Technology Inc.
Bank 7
380h
(1)
INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
381h
(1)
INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
382h
(1)
PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000
383h
(1)
STATUS —TOPD ZDCC---1 1000 ---q quuu
384h
(1)
FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu
385h
(1)
FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000
386h
(1)
FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu
387h
(1)
FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000
388h
(1)
BSR BSR<4:0> ---0 0000 ---0 0000
389h
(1)
WREG Working Register 0000 0000 uuuu uuuu
38Ah
(1)
PCLATH Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000
38Bh
(1)
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 000x 0000 000u
38Ch INLVLA
INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 --00 0100 --00 0100
38Dh INLVLB
(2)
INLVLB7 INLVLB6 INLVLB5 INLVLB4 0000 ---- 0000 ----
38Eh INLVLC
(3)
INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 --00 0000 --00 0000
INLVLC
(2)
INLVLC7 INLVLC6 INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 1111 1111 1111 1111
38Fh
Unimplemented
390h
Unimplemented
391h IOCAP
IOCAP5 IOCAP4 IOCAP3
IOCAP2 IOCAP1 IOCAP0
--00 0000 --00 0000
392h IOCAN
IOCAN5 IOCAN4 IOCAN3
IOCAN2 IOCAN1 IOCAN0
--00 0000 --00 0000
393h IOCAF
IOCAF5 IOCAF4 IOCAF3
IOCAF2 IOCAF1 IOCAF0
--00 0000 --00 0000
394h IOCBP
(2)
IOCBP7 IOCBP6 IOCBP5 IOCBP4 0000 ---- 0000 ----
395h IOCBN
(2)
IOCBN7 IOCBN6 IOCBN5 IOCBN4 0000 ---- 0000 ----
396h IOCBF
(2)
IOCBF7 IOCBF6 IOCBF5 IOCBF4 0000 ---- 0000 ----
397h
Unimplemented
398h
Unimplemented
399h
Unimplemented
39Ah CLKRCON CLKREN CLKROE CLKRSLR CLKRDC<1:0>
CLKRDIV
<2:0> 0011 0000 0011 0000
39Bh
Unimplemented
39Ch MDCON MDEN MDOE MDSLR MDOPOL MDOUT
MDBIT
0010 ---0 0010 ---0
39Dh MDSRC MDMSODIS
MDMS<3:0>
x--- xxxx u--- uuuu
39Eh MDCARL MDCLODIS MDCLPOL MDCLSYNC
MDCL<3:0>
xxx- xxxx uuu- uuuu
39Fh MDCARH MDCHODIS MDCHPOL MDCHSYNC
MDCH<3:0>
xxx- xxxx uuu- uuuu
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: PIC16(L)F1828 only.
3: PIC16(L)F1824 only.
4: Unimplemented, read as1’.