Datasheet
2010-2012 Microchip Technology Inc. DS41419D-page 35
PIC16(L)F1824/1828
Bank 4
200h
(1)
INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
201h
(1)
INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
202h
(1)
PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000
203h
(1)
STATUS — — —TOPD ZDCC---1 1000 ---q quuu
204h
(1)
FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu
205h
(1)
FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000
206h
(1)
FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu
207h
(1)
FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000
208h
(1)
BSR — — — BSR<4:0> ---0 0000 ---0 0000
209h
(1)
WREG Working Register 0000 0000 uuuu uuuu
20Ah
(1)
PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000
20Bh
(1)
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 000x 0000 000u
20Ch WPUA
— — WPUA5 WPUA4 WPUA3 WPUA2 WPUA1 WPUA0 --11 1111 --11 1111
20Dh WPUB
(2)
WPUB7 WPUB6 WPUB5 WPUB4 — — — — 1111 ---- 1111 ----
20Eh WPUC WPUC7
(2)
WPUC6
(2)
WPUC5 WPUC4 WPUC3 WPUC2 WPUC1 WPUC0 1111 1111 1111 1111
20Fh
— Unimplemented — —
210h
— Unimplemented — —
211h SSP1BUF Synchronous Serial Port Receive Buffer/Transmit Register xxxx xxxx uuuu uuuu
212h SSP1ADD ADD<7:0> 0000 0000 0000 0000
213h SSP1MSK MSK<7:0> 1111 1111 1111 1111
214h SSP1STAT SMP CKE D/A
PSR/WUA BF 0000 0000 0000 0000
215h SSP1CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 0000 0000 0000 0000
216h SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 0000 0000
217h SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 0000 0000 0000 0000
218h
— Unimplemented — —
219h
— Unimplemented — —
21Ah
— Unimplemented — —
21Bh
— Unimplemented — —
21Ch
— Unimplemented — —
21Dh
— Unimplemented — —
21Eh
— Unimplemented — —
21Fh
— Unimplemented — —
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: PIC16(L)F1828 only.
3: PIC16(L)F1824 only.
4: Unimplemented, read as ‘1’.