Datasheet
PIC16(L)F1824/1828
DS41419D-page 32 2010-2012 Microchip Technology Inc.
Bank 1
080h
(1)
INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
081h
(1)
INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
082h
(1)
PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000
083h
(1)
STATUS — — —TOPD ZDCC---1 1000 ---q quuu
084h
(1)
FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu
085h
(1)
FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000
086h
(1)
FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu
087h
(1)
FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000
088h
(1)
BSR — — — BSR<4:0> ---0 0000 ---0 0000
089h
(1)
WREG Working Register 0000 0000 uuuu uuuu
08Ah
(1)
PCLATH — Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000
08Bh
(1)
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 000x 0000 000u
08Ch TRISA
— — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 --11 1111 --11 1111
08Dh TRISB
(2)
TRISB7 TRISB6 TRISB5 TRISB4 — — — — 1111 ---- 1111 ----
08Eh TRISC TRISC7
(2)
TRISC6
(2)
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 1111 1111 1111 1111
08Fh
— Unimplemented — —
090h
— Unimplemented — —
091h PIE1 TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 0000 0000 0000 0000
092h PIE2 OSFIE C2IE C1IE EEIE BCL1IE
— — CCP2IE 0000 0--0 0000 0--0
093h PIE3
— — CCP4IE CCP3IE TMR6IE —TMR4IE— --00 0-0- --00 0-0-
094h
— Unimplemented — —
095h
OPTION_REG
WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0> 1111 1111 1111 1111
096h PCON STKOVF STKUNF
— —RMCLRRI POR BOR 00-- 11qq qq-- qquu
097h WDTCON
— — WDTPS<4:0> SWDTEN --01 0110 --01 0110
098h OSCTUNE
— — TUN<5:0> --00 0000 --00 0000
099h OSCCON SPLLEN IRCF<3:0>
—SCS<1:0>0011 1-00 0011 1-00
09Ah OSCSTAT T1OSCR PLLR OSTS HFIOFR HFIOFL MFIOFR LFIOFR HFIOFS 10q0 0q00 qqqq qq0q
09Bh ADRESL A/D Result Register Low xxxx xxxx uuuu uuuu
09Ch ADRESH A/D Result Register High xxxx xxxx uuuu uuuu
09Dh ADCON0
— CHS<4:0>
GO/DONE
ADON -000 0000 -000 0000
09Eh ADCON1 ADFM ADCS<2:0>
— ADNREF
ADPREF<1:0>
0000 -000 0000 -000
09Fh
— Unimplemented — —
TABLE 3-9: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: PIC16(L)F1828 only.
3: PIC16(L)F1824 only.
4: Unimplemented, read as ‘1’.