Datasheet
2010-2012 Microchip Technology Inc. DS41419D-page 287
PIC16(L)F1824/1828
FIGURE 25-34: BUS COLLISION DURING START CONDITION (SCL = 0)
FIGURE 25-35: BRG RESET DUE TO SDA ARBITRATION DURING START CONDITION
SDA
SCL
SEN
bus collision occurs. Set BCL1IF.
SCL = 0 before SDA = 0,
Set SEN, enable Start
sequence if SDA = 1, SCL = 1
TBRG
TBRG
SDA = 0, SCL = 1
BCL1IF
S
SSP1IF
Interrupt cleared
by software
bus collision occurs. Set BCL1IF.
SCL = 0 before BRG time-out,
‘0’‘0’
‘0’‘0’
SDA
SCL
SEN
Set S
Less than TBRG
TBRG
SDA = 0, SCL = 1
BCL1IF
S
SSP1IF
S
Interrupts cleared
by software
set SSP1IF
SDA = 0, SCL = 1,
SCL pulled low after BRG
time-out
Set SSP1IF
‘0’
SDA pulled low by other master.
Reset BRG and assert SDA.
Set SEN, enable Start
sequence if SDA = 1, SCL = 1