Datasheet

PIC16(L)F1824/1828
DS41419D-page 262  2010-2012 Microchip Technology Inc.
FIGURE 25-15: I
2
C SLAVE, 7-BIT ADDRESS, RECEPTION (SEN = 1, AHEN = 0, DHEN = 0)
SEN SEN
A7 A6 A5 A4 A3 A2 A1 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0SDA
SCL
123456789
123456789
123456789
P
SSP1IF set on 9th
SCL is not held
CKP is written to 1 in software,
CKP is written to ‘1’ in software,
ACK
low because
falling edge of SCL
releasing SCL
ACK
is not sent.
Bus Master sends
CKP
SSPOV
BF
SSP1IF
SSPOV set because SSP1BUF is still full.
Cleared by software
First byte
of data is
available in SSP1BUF
ACK
= 1
Cleared by software
SSP1BUF is read
Clock is held low until CKP is set to ‘1’
releasing SCL
Stop condition
S
ACK
ACK
Receive Address Receive Data Receive Data
R/W=0