Datasheet

 2010-2012 Microchip Technology Inc. DS41419D-page 199
PIC16(L)F1824/1828
TABLE 21-5: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER1
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA
— — —ANSA4 — ANSA2 ANSA1 ANSA0
127
CCP1CON
P1M<1:0> DC1B<1:0> CCP1M<3:0>
238
CCP2CON
P2M<:0>1 DC2B<1:0> CCP2M<3:0>
238
INLVLA
— — INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 128
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
93
PIE1 TMR1GIE
ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE
94
PIR1 TMR1GIF
ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF
97
TMR1H Holding Register for the Most Significant Byte of the 16-bit TMR1 Register
193*
TMR1L Holding Register for the Least Significant Byte of the 16-bit TMR1 Register
193*
TRISA
— —
TRISA5 TRISA4 TRISA3
TRISA2 TRISA1 TRISA0
126
T1CON
TMR1CS1 TMR1CS0 T1CKPS<1:0> T1OSCEN T1SYNC
—TMR1ON
197
T1GCON
TMR1GE T1GPOL T1GTM T1GSPM T1GGO/
DONE
T1GVAL T1GSS1 T1GSS0
198
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by the Timer1 module.
* Page provides register information.
Note 1: PIC16(L)F1828 only.