Datasheet

2010-2012 Microchip Technology Inc. DS41419D-page 175
PIC16(L)F1824/1828
TABLE 18-2: SUMMARY OF REGISTERS ASSOCIATED WITH SR LATCH MODULE
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
ANSELA
—ANSA4 ANSA2 ANSA1 ANSA0
127
INLVLA
INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 128
INLVLC
INLVLC7
(1)
INLVLC6
(1)
INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 139
SRCON0 SRLEN SRCLK<2:0> SRQEN SRNQEN SRPS SRPR 173
SRCON1 SRSPE SRSCKE SRSC2E SRSC1E SRRPE SRRCKE SRRC2E SRRC1E 173
TRISA
TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
126
TRISC
TRISC7
(1)
TRISC6
(1)
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 137
Legend: — = unimplemented, read as ‘0’. Shaded cells are unused by the SR latch module.
Note 1: PIC16(L)F1828 only.