Datasheet

2010-2012 Microchip Technology Inc. DS41419D-page 137
PIC16(L)F1824/1828
REGISTER 12-15: PORTC: PORTC REGISTER
R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u
RC7
(1)
RC6
(1)
RC5 RC4 RC3 RC2 RC1 RC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0 RC<7:0>: PORTC General Purpose I/O Pin bits
(1)
1 = Port pin is > VIH
0 = Port pin is < VIL
Note 1: RC<7:6> available on PIC16(L)F1828 only. Otherwise, they are unimplemented and read as ‘0’.
REGISTER 12-16: TRISC: PORTC TRI-STATE REGISTER
R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1 R/W-1/1
TRISC7
(1)
TRISC6
(1)
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0 TRISC<7:0>: PORTC Tri-State Control bits
(1)
1 = PORTC pin configured as an input (tri-stated)
0 = PORTC pin configured as an output
Note 1: TRISC<7:6> available on PIC16(L)F1828 only. Otherwise, they are unimplemented and read as 0’.
REGISTER 12-17: LATC: PORTC DATA LATCH REGISTER
R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u R/W-x/u
LATC7
(1)
LATC6
(1)
LATC5 LATC4 LATC3 LATC2 LATC1 LATC0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0 LATC<7:0>: PORTC Output Latch Value bits
(1, 2)
Note 1: Writes to PORTC are actually written to corresponding LATC register. Reads from PORTC register is
return of actual I/O pin values.
2: LATC<7:6> available on PIC16(L)F1828 only. Otherwise, they are unimplemented and read as ‘0’.