Information

PIC16(L)F1824/1828
DS80510H-page 8  2010-2012 Microchip Technology Inc.
8. Module: Enhanced Universal
Synchronous Asynchronous
Receiver (EUSART)
8.1 16-Bit High-Speed Asynchronous Mode
The EUSART provides unexpected operation
when the 16-Bit High-Speed Asynchronous mode
is selected and the Baud Rate Generator Data reg-
ister values are loaded with zero (0). We do not
recommend using this configuration for EUSART
communication. The configuration is shown below
in the following table:
Work around
Ensure that the SPBRGH or the SPBRGL register
is loaded with a non-zero value.
Affected Silicon Revisions
Configuration Bits BRG Data Registers
SYNC BRG16 BRGH SPBRGH Value SPBRGL Value
0 1 1 00000000 00000000
A1 A3 A4 A5
XXXX