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 2010-2012 Microchip Technology Inc. DS80510H-page 1

PIC16(L)F1824/1828

The PIC16(L)F1824/1828 family devices that you have

received conform functionally to the current Device Data

Sheet (DS41419D), except for the anomalies described

in this document.

The silicon issues discussed in the following pages are

for silicon revisions with the Device and Revision IDs

listed in Table 1. The silicon issues are summarized in

Table 2.

The errata described in this document will be addressed

in future revisions of the PIC16(L)F1824/1828 silicon.

Data Sheet clarifications and corrections start on page

12, following the discussion of silicon issues.

The silicon revision level can be identified using the

current version of MPLAB

IDE and Microchip’s

programmers, debuggers, and emulation tools, which

are available at the Microchip corporate web site

(www.microchip.com).

For example, to identify the silicon revision level

using MPLAB IDE in conjunction with a hardware

debugger:

1. Using the appropriate interface, connect the

device to the hardware debugger.

2. Open an MPLAB IDE project.

3. Configure the MPLAB IDE project for the

appropriate device and hardware debugger.

4. Based on the version of MPLAB IDE you are

using, do one of the following:

a) For MPLAB IDE 8, select Programmer >

Reconnect.

b) For MPLAB X IDE, select Window >

Dashboard and click the Refresh Debug

Tool Status icon ( ).

5. Depending on the development tool used, the

part number and Device Revision ID value

appear in the Output window.

The DEVREV values for the various PIC16(L)F1824/

1828 silicon revisions are shown in Table 1.

Note: This document summarizes all silicon

errata issues from all revisions of silicon,

previous as well as current. Only the

issues indicated in the last column of

Table 2 apply to the current silicon

revision (A5).

Note: If you are unable to extract the silicon

revision level, please contact your local

Microchip sales office for assistance.

TABLE 1: SILICON DEVREV VALUES

Part Number

DEVICE ID<13:0>

(1), (2)

DEV<8:0>

Revision ID for Silicon Revision

A1 A3 A4 A5

PIC16F1824 10 0111 010 0 0001 0 0011 0 0100 0 0101

PIC16LF1824 10 1000 010 0 0001 0 0011 0 0100 0 0101

PIC16F1828 10 0111 110 0 0001 0 0011 0 0100 0 0101

PIC16LF1828 10 1000 110 0 0001 0 0011 0 0100 0 0101

Note 1: The Device ID is located in the configuration memory at address 8006h.

2: Refer to the “PIC16F/LF182X/PIC12F/LF1822 Memory Programming Specification” (DS41390) for

detailed information on Device and Revision IDs for your specific device.

PIC16(L)F1824/1828 Family

Silicon Errata and Data Sheet Clarification

Summary of content (16 pages)

PAGE 1
PIC16(L)F1824/1828 PIC16(L)F1824/1828 Family Silicon Errata and Data Sheet Clarification The PIC16(L)F1824/1828 family devices that you have received conform functionally to the current Device Data Sheet (DS41419D), except for the anomalies described in this document. For example, to identify the silicon revision level using MPLAB IDE in conjunction with a hardware debugger: 1. The silicon issues discussed in the following pages are for silicon revisions with the Device and Revision IDs listed in Table 1.
PAGE 2
PIC16(L)F1824/1828 TABLE 2: SILICON ISSUE SUMMARY Module Feature Item Number Issue Summary Affected Revisions (1) A1 A3 A4 A5 ADC ADC Conversion 1.1 ADC Conversion may not complete. X Oscillator HS Oscillator 2.1 HS Oscillator min. VDD. X Oscillator Clock Switching 2.2 Clock switching can cause a single corrupted instruction. X X X X X X X X Oscillator Oscillator Start-up Timer 2.3 OSTS bit remains set. X Enhanced Capture Compare PWM (ECCP) Enhanced PWM 3.
PAGE 3
PIC16(L)F1824/1828 Silicon Errata Issues Note: Work around This document summarizes all silicon errata issues from all revisions of silicon, previous as well as current. Only the issues indicated by the shaded column in the following tables apply to the current silicon revision (A5). 1. Module: ADC 1.1 Analog-to-Digital Conversion An ADC conversion may not complete under these conditions: 1. 2. When FOSC is greater than 8 MHz and it is the clock source used for the ADC converter.
PAGE 4
PIC16(L)F1824/1828 In Figure 1, 88 instruction cycles (TCY) will be required to complete the full conversion. Each TAD cycle consists of 8 TCY periods. A fixed delay is provided to stop the A/D conversion after 86 instruction cycles and terminate the conversion at the correct time as shown in the figure above. 2. Module: Oscillator 2.1 HS Oscillator The HS oscillator requires a minimum voltage of 3.0 volts (at 65°C or less) to operate at 20 MHz. Work around None.
PAGE 5
PIC16(L)F1824/1828 2.3 Oscillator Start-up Timer During the Two-Speed Start-up sequence, the Oscillator Start-up Timer is enabled to count 1024 clock cycles. After the count is reached, the OSTS bit is set, the system clock is held low until the next falling edge of the external crystal (LP, XT or HS mode), before switching to the external clock source.
PAGE 6
PIC16(L)F1824/1828 5. Module: In-Circuit Serial Programming™ (ICSP™) 5.1 Bulk Erase Feature not available with LowVoltage Programming mode A bulk erase of the program Flash memory or data memory cannot be executed in Low-Voltage Programming mode. 6. Module: Clock Switching 6.1 OSTS Status Bit When the 4xPLL is enabled, the Oscillator Start-up Time-out Status (OSTS) bit always remains clear. Work around None.
PAGE 7
PIC16(L)F1824/1828 7. Module: BOR 7.1 BOR Reset Note: This issue affects only the PIC16LF1824/1828 devices. The device may undergo a BOR Reset when waking-up from Sleep and BOR is reenabled. A BOR Reset may also occur the moment the software BOR is enabled. Under certain voltage and temperature conditions and when either SBODEN or BOR_NSLEEP is selected, the devices may occasionally reset when waking-up from Sleep or BOR is enabled.
PAGE 8
PIC16(L)F1824/1828 8. Module: Enhanced Universal Synchronous Asynchronous Receiver (EUSART) 8.1 16-Bit High-Speed Asynchronous Mode The EUSART provides unexpected operation when the 16-Bit High-Speed Asynchronous mode is selected and the Baud Rate Generator Data register values are loaded with zero (0). We do not recommend using this configuration for EUSART communication.
PAGE 9
PIC16(L)F1824/1828 8.2 Auto-Baud Detect When using automatic baud detection (ABDEN), on occasion, an incorrect count value can be stored at the end of auto-baud detection in the SPBRGH:SPBRGL (SPBRG) registers. The SPBRG value may be off by several counts. This condition happens sporadically when the device clock frequency drifts to a frequency where the SPBRG value oscillates between two different values. The issue is present regardless of the baud rate Configuration bit settings.
PAGE 10
PIC16(L)F1824/1828 EXAMPLE 3: METHOD 2 – EUSART AUTO-BAUD DETECT WORK AROUND Similar to Method 1, define default, minimum and maximum auto-baud (SPBRG) values. In firmware, compute a running average of SPBRG. If the new SPBRG value falls outside the minimum or maximum limits, then use the current running average value (Average_Baud), otherwise use the auto-baud SPBRG value and calculate a new running average.
PAGE 11
PIC16(L)F1824/1828 9. Module: PFM Self Writes 9.1 PFM Writes to the PFM will not execute if the device’s clock source is HS, ECH, or the Internal Oscillator is at either 8 MHz or 16 MHz. The DFM is unaffected. Work around To write to the PFM, the clock source must be one of the following settings: Internal Oscillator set to 4 MHz or lower, ECM, ECL, XT, External RC, LP or T1OSC. Affected Silicon Revisions A1 A3 A4 A5 X  2010-2012 Microchip Technology Inc.
PAGE 12
PIC16(L)F1824/1828 Data Sheet Clarifications The following typographic corrections and clarifications are to be noted for the latest version of the device data sheet (DS41419D): Note: Corrections are shown in bold. Where possible, the original bold text formatting has been removed for clarity. None. DS80510H-page 12  2010-2012 Microchip Technology Inc.
PAGE 13
PIC16(L)F1824/1828 APPENDIX A: DOCUMENT REVISION HISTORY Rev A Document (06/2010) Initial release of this document. Rev B Document (07/2010) Revised Module 1.1; Added Module 6.1; Other minor corrections. Rev C Document (12/2010) Updated errata to new format; Added Revision A3; Added Module 7. Rev D Document (09/2011) Added Module 8, BOR. Rev E Document (02/2012) Updated Table 1; Added Modules 2.2, 2.3 and 2.4; Added Module 9, EUSART; Other minor corrections.
PAGE 14
PIC16(L)F1824/1828 NOTES: DS80510H-page 14  2010-2012 Microchip Technology Inc.
PAGE 15
Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature.
PAGE 16
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