Datasheet

 2011 Microchip Technology Inc. DS41391D-page 249
PIC16(L)F1826/27
FIGURE 25-15: I
2
C SLAVE, 7-BIT ADDRESS, RECEPTION (SEN = 1, AHEN = 0, DHEN = 0)
SEN SEN
A7 A6 A5 A4 A3 A2 A1 D7 D6 D5 D4 D3 D2 D1 D0 D7 D6 D5 D4 D3 D2 D1 D0SDAx
SCLx
123456789
123456789
123456789
P
SSPxIF set on 9th
SCLx is not held
CKP is written to 1 in software,
CKP is written to ‘1’ in software,
ACK
low because
falling edge of SCLx
releasing SCLx
ACK
is not sent.
Bus Master sends
CKP
SSPxOV
BF
SSPxIF
SSPxOV set because SSPxBUF is still full.
Cleared by software
First byte
of data is
available in SSPxBUF
ACK
= 1
Cleared by software
SSPxBUF is read
Clock is held low until CKP is set to ‘1’
releasing SCLx
Stop condition
S
ACK
ACK
Receive Address Receive Data Receive Data
R/W=0