Datasheet
2011 Microchip Technology Inc. DS41391D-page 119
PIC16(L)F1826/27
REGISTER 12-1: APFCON0: ALTERNATE PIN FUNCTION CONTROL REGISTER 0
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
RXDTSEL SDO1SEL SS1SEL P2BSEL
(1)
CCP2SEL
(1)
P1DSEL P1CSEL CCP1SEL
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7 RXDTSEL: Pin Selection bit
0 = RX/DT function is on RB1
1 = RX/DT function is on RB2
bit 6 SDO1SEL: Pin Selection bit
0 = SDO1 function is on RB2
1 = SDO1 function is on RA6
bit 5 SS1SEL: Pin Selection bit
0 = SS1 function is on RB5
1 = SS1 function is on RA5
bit 4 P2BSEL: Pin Selection bit
0 = P2B function is on RB7
1 = P2B function is on RA6
bit 3 CCP2SEL: Pin Selection bit
0 = CCP2/P2A function is on RB6
1 = CCP2/P2A function is on RA7
bit 2 P1DSEL: Pin Selection bit
0 = P1D function is on RB7
1 = P1D function is on RA6
bit 1 P1CSEL: Pin Selection bit
0 = P1C function is on RB6
1 = P1C function is on RA7
bit 0 CCP1SEL: Pin Selection bit
0 = CCP1/P1A function is on RB3
1 = CCP1/P1A function is on RB0
Note 1: PIC16(L)F1827 only.
REGISTER 12-2: APFCON1: ALTERNATE PIN FUNCTION CONTROL REGISTER 1
U-0 U-0 U-0 U-0 U-0 U-0 U-0 R/W-0/0
— — — — — — — TXCKSEL
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-1 Unimplemented: Read as ‘0’
bit 0 TXCKSEL: Pin Selection bit
0 = TX/CK function is on RB2
1 = TX/CK function is on RB5