Datasheet
2011 Microchip Technology Inc. DS41391D-page 293
PIC16(L)F1826/27
TABLE 26-2: SUMMARY OF REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
APFCON0 RXDTSEL
SDO1SEL SS1SEL P2BSEL
(1)
CCP2SEL
(1)
P1DSEL P1CSEL CCP1SEL 119
APFCON1
— — — — — — — TXCKSEL 119
BAUDCON ABDOVF RCIDL — SCKP BRG16 — WUE ABDEN 296
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 86
PIE1
TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE 87
PIR1
TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF 91
RCREG EUSART Receive Data Register 290*
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 295
SPBRGL BRG<7:0> 297*
SPBRGH BRG<15:8> 297*
TRISB TRISB7 TRISB6
TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0 127
TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 294
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for Asynchronous Reception.
* Page provides register information.
Note 1: PIC16(L)F1827 only.