Datasheet
2011 Microchip Technology Inc. DS41391D-page 29
PIC16(L)F1826/27
Bank 2
10Ch LATA LATA7 LATA6 — LATA4 LATA3 LATA2 LATA1 LATA0 xx-x xxxx uu-u uuuu
10Dh LATB LATB7 LATB6 LATB5 LATB4 LATB3 LATB2 LATB1 LATB0 xxxx xxxx uuuu uuuu
10Eh
— Unimplemented — —
10Fh
— Unimplemented — —
110h
— Unimplemented — —
111h CM1CON0 C1ON C1OUT C1OE C1POL
— C1SP C1HYS C1SYNC 0000 -100 0000 -100
112h CM1CON1 C1INTP C1INTN C1PCH1 C1PCH0
— — C1NCH<1:0> 0000 --00 0000 --00
113h CM2CON0 C2ON C2OUT C2OE C2POL
— C2SP C2HYS C2SYNC 0000 -100 0000 -100
114h CM2CON1 C2INTP C2INTN C2PCH1 C2PCH0
— — C2NCH1 C2NCH0 0000 --00 0000 --00
115h CMOUT
— — — — — — MC2OUT MC1OUT ---- --00 ---- --00
116h BORCON SBOREN
— — — — — — BORRDY 1--- ---q u--- ---u
117h FVRCON FVREN FVRRDY
Reserved Reserved CDAFVR1 CDAFVR0 ADFVR1 ADFVR0 0qrr 0000 0qrr 0000
118h DACCON0 DACEN DACLPS DACOE
— DACPSS1 DACPSS0 — DACNSS 000- 00-0 000- 00-0
119h DACCON1
— — — DACR4 DACR3 DACR2 DACR1 DACR0 ---0 0000 ---0 0000
11Ah SRCON0 SRLEN SRCLK2 SRCLK1 SRCLK0 SRQEN SRNQEN SRPS SRPR 0000 0000 0000 0000
11Bh SRCON1 SRSPE SRSCKE SRSC2E SRSC1E SRRPE SRRCKE SRRC2E SRRC1E 0000 0000 0000 0000
11Ch
— Unimplemented — —
11Dh APFCON0 RXDTSEL SDO1SEL SS1SEL P2BSEL
(1)
CCP2SEL
(1)
P1DSEL P1CSEL CCP1SEL 0000 0000 0000 0000
11Eh APFCON1
— — — — — — — TXCKSEL ---- ---0 ---- ---0
11Fh
— Unimplemented — —
Bank 3
18Ch ANSELA — — — ANSA4 ANSA3 ANSA2 ANSA1 ANSA0 ---1 1111 ---1 1111
18Dh ANSELB ANSB7 ANSB6 ANSB5 ANSB4 ANSB3 ANSB2 ANSB1
— 1111 111- 1111 111-
18Eh
— Unimplemented — —
18Fh
— Unimplemented — —
190h
— Unimplemented — —
191h EEADRL EEPROM / Program Memory Address Register Low Byte 0000 0000 0000 0000
192h EEADRH
— EEPROM / Program Memory Address Register High Byte -000 0000 -000 0000
193h EEDATL EEPROM / Program Memory Read Data Register Low Byte xxxx xxxx uuuu uuuu
194h EEDATH
— — EEPROM / Program Memory Read Data Register High Byte --xx xxxx --uu uuuu
195h EECON1 EEPGD CFGS LWLO FREE WRERR WREN WR RD 0000 x000 0000 q000
196h EECON2 EEPROM control register 2 0000 0000 0000 0000
197h
— Unimplemented — —
198h
— Unimplemented — —
199h RCREG USART Receive Data Register 0000 0000 0000 0000
19Ah TXREG USART Transmit Data Register 0000 0000 0000 0000
19Bh SPBRGL Baud Rate Generator Data Register Low 0000 0000 0000 0000
19Ch SPBRGH Baud Rate Generator Data Register High 0000 0000 0000 0000
19Dh RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 0000 000x 0000 000x
19Eh TXSTA CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 0000 0010 0000 0010
19Fh BAUDCON ABDOVF RCIDL
— SCKP BRG16 — WUE ABDEN 01-0 0-00 01-0 0-00
TABLE 3-6: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: PIC16(L)F1827 only.