Information

PIC16(L)F1826/1827
DS80000485L-page 2  2009-2013 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature
Item
Number
Issue Summary
Affected Revisions
(1)
A2 A3 A4 A5 A6
Data EE Memory Memory Endurance 1.1 Erase/Write endurance limited. X X
Program Flash
Memory (PFM)
Endurance 2.1 Erase/Write endurance limited. X X
Timer1 Timer0 Gate Source 3.1 Toggle mode works
improperly.
XX
Oscillator HS mode 4.1 Frequency/Voltage range. X X X X X
Oscillator HFINTOSC Ready/
Stable bit
4.2 Bits remained set to ‘1’ after
initial trigger.
XXXXX
Oscillator Oscillator Start-up
Timer (OST) bit
4.3 OST bit remains set. X X X X
ADC ADC Conversion 5.1 ADC Conversion may not
complete.
XX
Enhanced Capture
Compare PWM
(ECCP)
Enhanced PWM 6.1 PWM 0% duty cycle direction
change.
XX
Enhanced Capture
Compare PWM
(ECCP)
Enhanced PWM 6.2 PWM 0% duty cycle port
steering.
XX
Resets Power-on Reset
(POR)
7.1 Reset under low-power
conditions.
X
Timer1 T1 Gate Toggle mode 8.1 T1 gate flip-flop does not clear. X X
BOR Wake-up from Sleep 9.1 Device resets on wake-up
from Sleep (LF devices only).
XXX
Enhanced
Universal
Synchronous
Asynchronous
Receiver
(EUSART)
16-Bit High-Speed
Asynchronous mode
10.1 Works improperly at maximum
rate.
XXXXX
Enhanced
Universal
Synchronous
Asynchronous
Receiver
(EUSART)
Auto-Baud Detect 10.2 Auto-Baud Detect may store
incorrect count value in the
SPBRG registers.
XXXX
Note 1: Only those issues indicated in the last column apply to the current silicon revision.