Datasheet

 2011 Microchip Technology Inc. DS41391D-page 397
PIC16(L)F1826/27
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART)............................... 285
Errata .................................................................................... 8
EUSART ........................................................................... 285
Associated Registers
Baud Rate Generator........................................ 298
Asynchronous Mode ................................................. 287
12-bit Break Transmit and Receive .................. 305
Associated Registers
Receive..................................................... 293
Transmit.................................................... 289
Auto-Wake-up on Break ................................... 303
Baud Rate Generator (BRG) ............................ 297
Clock Accuracy ................................................. 294
Receiver............................................................ 290
Setting up 9-bit Mode with Address Detect....... 292
Transmitter........................................................ 287
Baud Rate Generator (BRG)
Auto Baud Rate Detect ..................................... 302
Baud Rate Error, Calculating ............................ 297
Baud Rates, Asynchronous Modes .................. 299
Formulas ........................................................... 298
High Baud Rate Select (BRGH Bit) .................. 297
Synchronous Master Mode ............................... 306, 311
Associated Registers
Receive..................................................... 310
Transmit.................................................... 308
Reception.......................................................... 309
Transmission .................................................... 306
Synchronous Slave Mode
Associated Registers
Receive..................................................... 312
Transmit.................................................... 311
Reception.......................................................... 312
Transmission .................................................... 311
Extended Instruction Set
ADDFSR ................................................................... 329
F
Fail-Safe Clock Monitor....................................................... 63
Fail-Safe Condition Clearing....................................... 63
Fail-Safe Detection ..................................................... 63
Fail-Safe Operation..................................................... 63
Reset or Wake-up from Sleep..................................... 63
Firmware Instructions........................................................ 325
Fixed Voltage Reference (FVR)
Associated Registers ................................................ 136
Flash Program Memory .................................................... 101
Erasing...................................................................... 107
Modifying................................................................... 111
Writing....................................................................... 107
FSR Register ...................................................................... 27
FVRCON (Fixed Voltage Reference Control) Register..... 136
I
I
2
C Mode (MSSPx)
Acknowledge Sequence Timing................................ 270
Bus Collision
During a Repeated Start Condition................... 275
During a Stop Condition.................................... 276
Effects of a Reset...................................................... 271
I
2
C Clock Rate w/BRG.............................................. 278
Master Mode
Operation .......................................................... 262
Reception.......................................................... 268
Start Condition Timing .............................. 264, 265
Transmission .................................................... 266
Multi-Master Communication, Bus Collision and
Arbitration ......................................................... 271
Multi-Master Mode.................................................... 271
Read/Write Bit Information (R/W
Bit)........................ 247
Slave Mode
Transmission .................................................... 252
Sleep Operation........................................................ 271
Stop Condition Timing .............................................. 270
INDF Register..................................................................... 27
Indirect Addressing ............................................................. 39
Instruction Format............................................................. 326
Instruction Set................................................................... 325
ADDLW..................................................................... 329
ADDWF .................................................................... 329
ADDWFC.................................................................. 329
ANDLW..................................................................... 329
ANDWF .................................................................... 329
BRA .......................................................................... 330
CALL......................................................................... 331
CALLW ..................................................................... 331
LSLF......................................................................... 333
LSRF ........................................................................ 333
MOVF ....................................................................... 333
MOVIW..................................................................... 334
MOVLB..................................................................... 334
MOVWI..................................................................... 335
OPTION.................................................................... 335
RESET...................................................................... 335
SUBWFB .................................................................. 337
TRIS ......................................................................... 338
BCF .......................................................................... 330
BSF........................................................................... 330
BTFSC...................................................................... 330
BTFSS...................................................................... 330
CALL......................................................................... 331
CLRF ........................................................................ 331
CLRW ....................................................................... 331
CLRWDT .................................................................. 331
COMF ....................................................................... 331
DECF........................................................................ 331
DECFSZ ................................................................... 332
GOTO....................................................................... 332
INCF ......................................................................... 332
INCFSZ..................................................................... 332
IORLW...................................................................... 332
IORWF...................................................................... 332
MOVLW.................................................................... 334
MOVWF.................................................................... 334
NOP.......................................................................... 335
RETFIE..................................................................... 336
RETLW..................................................................... 336
RETURN................................................................... 336
RLF........................................................................... 336
RRF .......................................................................... 337
SLEEP...................................................................... 337
SUBLW..................................................................... 337
SUBWF..................................................................... 337
SWAPF..................................................................... 338
XORLW .................................................................... 338
XORWF .................................................................... 338
INTCON Register................................................................ 86
Internal Oscillator Block
INTOSC
Specifications ................................................... 355