Datasheet

PIC16(L)F1826/27
DS41391D-page 30  2011 Microchip Technology Inc.
Bank 4
20Ch WPUA — —WPUA5— — — — — --1- ---- --1- ----
20Dh WPUB WPUB7 WPUB6 WPUB5 WPUB4 WPUB3 WPUB2 WPUB1 WPUB0 1111 1111 1111 1111
20Eh
— Unimplemented — —
20Fh
— Unimplemented — —
210h
— Unimplemented — —
211h SSP1BUF Synchronous Serial Port Receive Buffer/Transmit Register xxxx xxxx uuuu uuuu
212h SSP1ADD ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0 0000 0000 0000 0000
213h SSP1MSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 1111 1111 1111 1111
214h SSP1STAT SMP CKE D/A
PSR/WUA BF 0000 0000 0000 0000
215h SSP1CON1 WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000
216h SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 0000 0000
217h SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 0000 0000 0000 0000
218h
— Unimplemented — —
219h SSP2BUF
(1)
Synchronous Serial Port Receive Buffer/Transmit Register xxxx xxxx uuuu uuuu
21Ah SSP2ADD
(1)
ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0 0000 0000 0000 0000
21Bh SSP2MSK
(1)
MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 1111 1111 1111 1111
21Ch SSP2STAT
(1)
SMP CKE D/A PSR/WUA BF 0000 0000 0000 0000
21Dh SSP2CON1
(1)
WCOL SSPOV SSPEN CKP SSPM3 SSPM2 SSPM1 SSPM0 0000 0000 0000 0000
21Eh SSP2CON2
(1)
GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 0000 0000 0000 0000
21Fh SSP2CON3
(1)
ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 0000 0000 0000 0000
Bank 5
28Ch — Unimplemented — —
28Dh
— Unimplemented — —
28Eh
— Unimplemented — —
28Fh
— Unimplemented — —
290h
— Unimplemented — —
291h CCPR1L Capture/Compare/PWM Register 1 (LSB) xxxx xxxx uuuu uuuu
292h CCPR1H Capture/Compare/PWM Register 1 (MSB) xxxx xxxx uuuu uuuu
293h CCP1CON P1M1 P1M0 DC1B1 DC1B0 CCP1M3 CCP1M2 CCP1M1 CCP1M0 0000 0000 0000 0000
294h PWM1CON P1RSEN P1DC6 P1DC5 P1DC4 P1DC3 P1DC2 P1DC1 P1DC0 0000 0000 0000 0000
295h CCP1AS CCP1ASE CCP1AS2 CCP1AS1 CCP1AS0 PSS1AC1 PSS1AC0 PSS1BD1 PSS1BD0 0000 0000 0000 0000
296h PSTR1CON
— — — STR1SYNC STR1D STR1C STR1B STR1A ---0 0001 ---0 0001
297h
— Unimplemented — —
298h CCPR2L
(1)
Capture/Compare/PWM Register 2 (LSB) xxxx xxxx uuuu uuuu
299h CCPR2H
(1)
Capture/Compare/PWM Register 2 (MSB) xxxx xxxx uuuu uuuu
29Ah CCP2CON
(1)
P2M1 P2M0 DC2B1 DC2B0 CCP2M3 CCP2M2 CCP2M1 CCP2M0 0000 0000 0000 0000
29Bh PWM2CON
(1)
P2RSEN P2DC6 P2DC5 P2DC4 P2DC3 P2DC2 P2DC1 P2DC0 0000 0000 0000 0000
29Ch CCP2AS
(1)
CCP2ASE CCP2AS2 CCP2AS1 CCP2AS0 PSS2AC1 PSS2AC0 PSS2BD1 PSS2BD0 0000 0000 0000 0000
29Dh PSTR2CON
(1)
— — — STR2SYNC STR2D STR2C STR2B STR2A ---0 0001 ---0 0001
29Eh CCPTMRS
(1)
C4TSEL1 C4TSEL0 C3TSEL1 C3TSEL0 C2TSEL1 C2TSEL0 C1TSEL1 C1TSEL0 0000 0000 0000 0000
29Fh
— Unimplemented — —
TABLE 3-6: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: PIC16(L)F1827 only.