Datasheet

 2011 Microchip Technology Inc. DS41391D-page 227
PIC16(L)F1826/27
REGISTER 24-2: CCPTMRS: PWM TIMER SELECTION CONTROL REGISTER
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
C4TSEL<1:0> C3TSEL<1:0> C2TSEL<1:0> C1TSEL<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-6 C4TSEL<1:0>: CCP4 Timer Selection
00 =CCP4 is based off Timer 2 in PWM Mode
01 =CCP4 is based off Timer 4 in PWM Mode
10 =CCP4 is based off Timer 6 in PWM Mode
11 =Reserved
bit 5-4 C3TSEL<1:0>: CCP3 Timer Selection
00 =CCP3 is based off Timer 2 in PWM Mode
01 =CCP3 is based off Timer 4 in PWM Mode
10 =CCP3 is based off Timer 6 in PWM Mode
11 =Reserved
bit 3-2 C2TSEL<1:0>: CCP2 Timer Selection
00 =CCP2 is based off Timer 2 in PWM Mode
01 =CCP2 is based off Timer 4 in PWM Mode
10 =CCP2 is based off Timer 6 in PWM Mode
11 =Reserved
bit 1-0 C1TSEL<1:0>: CCP1 Timer Selection
00 =CCP1 is based off Timer 2 in PWM Mode
01 =CCP1 is based off Timer 4 in PWM Mode
10 =CCP1 is based off Timer 6 in PWM Mode
11 =Reserved