Datasheet
2011 Microchip Technology Inc. DS41391D-page 225
PIC16(L)F1826/27
TABLE 24-10: SUMMARY OF REGISTERS ASSOCIATED WITH ENHANCED PWM
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
APFCON0
RXDTSEL SDO1SEL SS1SEL P2BSEL
(2)
CCP2SEL
(2)
P1DSEL P1CSEL CCP1SEL
119
CCPxCON PxM<1:0>
(1)
DCxB<1:0> CCPxM<3:0>
226
CCPxAS CCPxASE CCPxAS<2:0> PSSxAC<1:0> PSSxBD<1:0> 228
CCPTMRS C4TSEL<1:0> C3TSEL<1:0> C2TSEL<1:0> C1TSEL<1:0> 227
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
86
PIE1
TMR1GIE ADIE RCIE TXIE SSPIE CCP1IE TMR2IE TMR1IE
87
PIE2
OSFIE C2IE C1IE EEIE BCLIE — — CCP2IE
88
PIE3
(2)
— — CCP4IE CCP3IE TMR6IE — TMR4IE —
89
PIR1
TMR1GIF ADIF RCIF TXIF SSPIF CCP1IF TMR2IF TMR1IF
91
PIR2
OSFIF C2IF C1IF EEIF BCLIF — —CCP2IF
92
PIR3
(2)
— — CCP4IF CCP3IF TMR6IF — TMR4IF —
93
PR2
Timer2 Period Register
189*
PR4 Timer4 Module Period Register
189*
PR6 Timer6 Module Period Register
189*
PSTRxCON
— — — STRxSYNC STRxD STRxC STRxB STRxA 230
PWMxCON PxRSEN PxDC<6:0> 229
T2CON
— T2OUTPS3 T2OUTPS2 T2OUTPS1 T2OUTPS0 TMR2ON T2CKPS1 T2CKPS0
191
T4CON
— T4OUTPS3 T4OUTPS2 T4OUTPS1 T4OUTPS0 TMR4ON T4CKPS1 T4CKPS0
191
T6CON
— T6OUTPS3 T6OUTPS2 T6OUTPS1 T6OUTPS0 TMR6ON T6CKPS1 T6CKPS0
191
TMR2 Holding Register for the 8-bit TMR2 Time Base
189*
TMR4 Holding Register for the 8-bit TMR4 Time Base
(1)
189*
TMR6 Holding Register for the 8-bit TMR6 Time Base
(1)
189*
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
122
TRISB
TRISB7 TRISB6 TRISB5 TRISB4 TRISB3 TRISB2 TRISB1 TRISB0
127
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
* Page provides register information.
Note 1: Applies to ECCP modules only.
2: PIC16(L)F1827 only.