Information

PIC16(L)F1825/1829
DS80000517E-page 2  2011-2013 Microchip Technology Inc.
TABLE 2: SILICON ISSUE SUMMARY
Module Feature
Item
Number
Issue Summary
Affected Revisions
(1)
A0 A2
Oscillator LFINTOSC 1.1 Wake from Sleep. X
Oscillator HFINTOSC Ready/
Stable bit
1.2 Bits remained set to ‘1’ after
initial trigger.
XX
Oscillator Clock Switching 1.3 Clock switching can cause a
single corrupted instruction.
X
Oscillator Oscillator Start-up
Timer
1.4 OSTS bit remains set. X X
Timer1 T1 Gate Toggle mode 2.1 T1 Gate flip-flop does not
clear.
X
ADC Error Parameters 3.1 Differential and gain error. X X
In-Circuit Serial
Programming™ (ICSP™)
Low-Voltage
Programming
4.1 Bulk Erase not available with
LVP.
X
Clock Switching OSTS Status Bit 5.1 Remains clear when 4xPLL
enabled.
XX
MSSP (Master
Synchronous Serial Port)
Slew Rate 6.1 Slow rate reduction on
SSP2.
XX
Enhanced Universal
Synchronous
Asynchronous Receiver
(EUSART)
Auto-Baud Detect 7.1 Auto-Baud Detect may store
incorrect count value in the
SPBRG registers.
X
Enhanced Universal
Synchronous
Asynchronous Receiver
(EUSART)
16-Bit High-Speed
Asynchronous mode
7.2 Works improperly at
maximum rate.
XX
Note 1: Only those issues indicated in the last column apply to the current silicon revision.