Datasheet

PIC16(L)F1824/1828

DS41419D-page 70  2010-2012 Microchip Technology Inc.

5.6 Oscillator Control Registers

R/W-0/0 R/W-0/0 R/W-1/1 R/W-1/1 R/W-1/1 U-0 R/W-0/0 R/W-0/0

SPLLEN IRCF<3:0>

—

SCS<1:0>

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set ‘0’ = Bit is cleared

bit 7 SPLLEN: Software PLL Enable bit

If PLLEN in Configuration Word 1 =

SPLLEN bit is ignored. 4xPLL is always enabled (subject to oscillator requirements)

If PLLEN in Configuration Word 1 = 0:

1 = 4xPLL Is enabled

0 = 4xPLL is disabled

bit 6-3 IRCF<3:0>: Internal Oscillator Frequency Select bits

000x =31kHz LF

0010 = 31.25 kHz MF

0011 = 31.25 kHz HF

(1)

0100 = 62.5 kHz MF

0101 = 125 kHz MF

0110 = 250 kHz MF

0111 = 500 kHz MF (default upon Reset)

1000 = 125 kHz HF

(1)

1001 = 250 kHz HF

(1)

1010 = 500 kHz HF

(1)

1011 =1MHz HF

1100 =2MHz HF

1101 =4MHz HF

1110 = 8 MHz or 32 MHz HF(see Section 5.2.2.1 “HFINTOSC”)

1111 = 16 MHz HF

bit 2 Unimplemented: Read as ‘0’

bit 1-0 SCS<1:0>: System Clock Select bits

1x = Internal oscillator block

01 = Timer1 oscillator

00 = Clock determined by FOSC<2:0> in Configuration Word 1.

Note 1: Duplicate frequency derived from HFINTOSC.