Datasheet

 2010-2012 Microchip Technology Inc. DS41419D-page 307
PIC16(L)F1824/1828
TABLE 26-2: SUMMARY OF REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
APFCON0 RXDTSEL
SDOSEL
(2)
SSSEL
(2)
— T1GSEL TXCKSEL — — 122
BAUDCON
ABDOVF RCIDL — SCKP BRG16 —WUEABDEN 310
INLVLA
(3)
— — INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 128
INLVLB
(1)
INLVLB7 INLVLB6 INLVLB5 INLVLB4 — — — — 133
INLVLC
INLVLC7
(1)
INLVLC6
(1)
INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 139
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 93
PIE1
TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 94
PIR1
TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF 97
RCREG EUSART Receive Data Register 304*
RCSTA SPEN RX9 SREN CREN ADDEN FERR OERR RX9D 309
SPBRGL BRG7 BRG6 BRG5 BRG4 BRG3 BRG2 BRG1 BRG0 311*
SPBRGH BRG15 BRG14 BRG13 BRG12 BRG11 BRG10 BRG9 BRG8 311*
TRISA
(3)
— — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 126
TRISB
(1)
TRISB7 TRISB6 TRISB5 TRISB4 — — — —
132
TRISC
TRISC7
(1)
TRISC6
(1)
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 132
TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 308
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for asynchronous reception.
* Page provides register information.
Note 1: PIC16(L)F1828 only.
2: PIC16(L)F1824 only.
3: Unshaded cells apply to PIC16(L)F1828 only.