Datasheet

PIC16(L)F1824/1828

DS41419D-page 242  2010-2012 Microchip Technology Inc.

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U-0 U-0 U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-1/1

— — — STRxSYNC STRxD STRxC STRxB STRxA

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set ‘0’ = Bit is cleared

bit 7-5 Unimplemented: Read as ‘0’

bit 4 STRxSYNC: Steering Sync bit

1 = Output steering update occurs on next PWM period

0 = Output steering update occurs at the beginning of the instruction cycle boundary

bit 3 STRxD: Steering Enable bit D

1 = PxD pin has the PWM waveform with polarity control from CCPxM<1:0>

0 = PxD pin is assigned to port pin

bit 2 STRxC: Steering Enable bit C

1 = PxC pin has the PWM waveform with polarity control from CCPxM<1:0>

0 = PxC pin is assigned to port pin

bit 1 STRxB: Steering Enable bit B

1 = PxB pin has the PWM waveform with polarity control from CCPxM<1:0>

0 = PxB pin is assigned to port pin

bit 0 STRxA: Steering Enable bit A

1 = PxA pin has the PWM waveform with polarity control from CCPxM<1:0>

0 = PxA pin is assigned to port pin

Note 1: The PWM Steering mode is available only when the CCPxCON register bits CCPxM<3:2> = 11 and

PxM<1:0> = 00.