Datasheet

PIC16(L)F1824/1828
DS41419D-page 188  2010-2012 Microchip Technology Inc.
TABLE 20-1: SUMMARY OF REGISTERS ASSOCIATED WITH TIMER0
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
CPSCON0 CPSON CPSRM — — CPSRNG<1:0> CPSOUT T0XCS
333
FVRCON FVREN FVRRDY
TSEN TSRNG CDAFVR<1:0> ADFVR<1:0> 148
INLVLA
— — INLVLA5 INLVLA4 INLVLA3 INLVLA2 INLVLA1 INLVLA0 128
INTCON GIE PEIE TMR0IE
INTE IOCIE TMR0IF INTF IOCIF
93
OPTION_REG
WPUEN INTEDG TMR0CS TMR0SE PSA PS<2:0>
187
TMR0 Timer0 Module Register
185*
TRISA
— — TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0
126
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the Timer0 module.
* Page provides register information.