Datasheet

PIC16(L)F1824/1828
DS41419D-page 290  2010-2012 Microchip Technology Inc.
TABLE 25-3: SUMMARY OF REGISTERS ASSOCIATED WITH I
2
C™ OPERATION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Reset
Values on
Page:
INLVLB
(1)
INLVLB7 INLVLB6
INLVLB5 INLVLB4 — — — — 133
INLVLC
INLVLC7
(1)
INLVLC6
(1)
INLVLC5 INLVLC4 INLVLC3 INLVLC2 INLVLC1 INLVLC0 139
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 93
PIE1
TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 94
PIE2
OSFIE C2IE C1IE EEIE BCL1IE
—
—CCP2IE95
PIR1
TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF
97
PIR2
OSFIF C2IF C1IF EEIF BCL1IF — —
CCP2IF 98
SSP1ADD ADD7 ADD6 ADD5 ADD4 ADD3 ADD2 ADD1 ADD0 296
SSP1BUF Synchronous Serial Port Receive Buffer/Transmit Register 247*
SSP1CON1 WCOL SSPOV SSPEN CKP SSPM<3:0> 293
SSP1CON2 GCEN ACKSTAT ACKDT ACKEN RCEN PEN RSEN SEN 294
SSP1CON3 ACKTIM PCIE SCIE BOEN SDAHT SBCDE AHEN DHEN 295
SSP1MSK MSK7 MSK6 MSK5 MSK4 MSK3 MSK2 MSK1 MSK0 296
SSP1STAT SMP CKE
D/A P S R/W UA BF 292
TRISB
(1)
TRISB7 TRISB6
TRISB5 TRISB4 — — — — 132
TRISC
(2)
— — TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 132
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used by the MSSP module in I
2
C™ mode.
* Page provides register information.
Note 1: PIC16(L)F1828 only.
2: Unshaded cells apply to PIC16(L)F1824 only.