Datasheet

PIC12(L)F1822/PIC16(L)F1823
DS41413C-page 78 2010-2012 Microchip Technology Inc.
7.1 Power-on Reset (POR)
The POR circuit holds the device in Reset until VDD has
reached an acceptable level for minimum operation.
Slow rising V
DD, fast operating speeds or analog
performance may require greater than minimum V
DD.
The PWRT, BOR or MCLR
features can be used to
extend the start-up period until all device operation
conditions have been met.
7.1.1 POWER-UP TIMER (PWRT)
The Power-up Timer provides a nominal 64 ms time-
out on POR or Brown-out Reset.
The device is held in Reset as long as PWRT is active.
The PWRT delay allows additional time for the V
DD to
rise to an acceptable level. The Power-up Timer is
enabled by clearing the PWRTE bit in Configuration
Word 1.
The Power-up Timer starts after the release of the POR
and BOR.
For additional information, refer to Application Note
AN607, “Power-up Trouble Shooting” (DS00607).
7.2 Brown-Out Reset (BOR)
The BOR circuit holds the device in Reset when VDD
reaches a selectable minimum level. Between the
POR and BOR, complete voltage range coverage for
execution protection can be implemented.
The Brown-out Reset module has four operating
modes controlled by the BOREN<1:0> bits in Configu-
ration Word 1. The four operating modes are:
BOR is always on
BOR is off when in Sleep
BOR is controlled by software
BOR is always off
Refer to Tab le 7-1 for more information.
The Brown-out Reset voltage level is selectable by
configuring the BORV bit in Configuration Word 2.
A V
DD noise rejection filter prevents the BOR from trig-
gering on small events. If V
DD falls below VBOR for a
duration greater than parameter T
BORDC, the device
will reset. See Figure 7-3 for more information.
TABLE 7-1: BOR OPERATING MODES
7.2.1 BOR IS ALWAYS ON
When the BOREN bits of Configuration Word 1 are set
to ‘11’, the BOR is always on. The device start-up will
be delayed until the BOR is ready and V
DD is higher
than the BOR threshold.
BOR protection is active during Sleep. The BOR does
not delay wake-up from Sleep.
7.2.2 BOR IS OFF IN SLEEP
When the BOREN bits of Configuration Word 1 are set
to ‘10’, the BOR is on, except in Sleep. The device
start-up will be delayed until the BOR is ready and V
DD
is higher than the BOR threshold.
BOR protection is not active during Sleep. The device
wake-up will be delayed until the BOR is ready.
BOREN
Config bits
SBOREN Device Mode BOR Mode
Device
Operation upon
release of POR
Device
Operation upon
wake- up from
Sleep
BOR_ON (11) X X Active Waits for BOR ready
(1)
BOR_NSLEEP (10) X Awake Active
Waits for BOR ready
BOR_NSLEEP (10) X Sleep Disabled
BOR_SBOREN (01) 1 X Active Begins immediately
BOR_SBOREN (01) 0 X Disabled Begins immediately
BOR_OFF (00) X X Disabled Begins immediately
Note 1: In these specific cases, “Release of POR” and “Wake-up from Sleep”, there is no delay in start-up. The
BOR ready flag, (BORRDY = 1), will be set before the CPU is ready to execute instructions because the
BOR circuit is forced on by the BOREN<1:0> bits.