Datasheet

PIC12(L)F1822/PIC16(L)F1823
DS41413C-page 432  2010-2012 Microchip Technology Inc.
T1CON..............................................................187
T1GCON...........................................................188
Timer2
T2CON..............................................................193
Timing Diagrams
A/D Conversion......................................................... 364
A/D Conversion (Sleep Mode) .................................. 364
Acknowledge Sequence ........................................... 271
Asynchronous Reception .......................................... 292
Asynchronous Transmission ..................................... 288
Asynchronous Transmission (Back to Back) ............ 288
Auto Wake-up Bit (WUE) During Normal Operation . 304
Auto Wake-up Bit (WUE) During Sleep .................... 304
Automatic Baud Rate Calibration.............................. 302
Baud Rate Generator with Clock Arbitration ............. 265
BRG Reset Due to SDA Arbitration During Start
Condition........................................................... 274
Brown-out Reset (BOR) ............................................360
Brown-out Reset Situations ........................................ 79
Bus Collision During a Repeated Start Condition
(Case 1) ............................................................275
Bus Collision During a Repeated Start Condition
(Case 2) ............................................................275
Bus Collision During a Start Condition (SCL = 0) .....274
Bus Collision During a Stop Condition (Case 1) ....... 276
Bus Collision During a Stop Condition (Case 2) ....... 276
Bus Collision During Start Condition (SDA only) ...... 273
Bus Collision for Transmit and Acknowledge............ 272
CLKOUT and I/O....................................................... 358
Clock Synchronization .............................................. 262
Clock Timing ............................................................. 356
Comparator Output ...................................................165
Enhanced Capture/Compare/PWM (ECCP) ............. 362
Fail-Safe Clock Monitor (FSCM) ................................. 68
First Start Bit Timing .................................................265
Full-Bridge PWM Output ........................................... 219
Half-Bridge PWM Output .................................. 217, 224
I
2
C Bus Data.............................................................370
I
2
C Bus Start/Stop Bits.............................................. 369
I
2
C Master Mode (7 or 10-Bit Transmission) ............ 268
I
2
C Master Mode (7-Bit Reception)........................... 270
I
2
C Stop Condition Receive or Transmit Mode ......... 271
INT Pin Interrupt..........................................................91
Internal Oscillator Switch Timing.................................63
PWM Auto-shutdown ................................................ 223
Firmware Restart .............................................. 222
PWM Direction Change ............................................ 220
PWM Direction Change at Near 100% Duty Cycle ... 221
PWM Output (Active-High)........................................ 215
PWM Output (Active-Low) ........................................ 216
Repeat Start Condition..............................................266
Reset Start-up Sequence............................................82
Reset, WDT, OST and Power-up Timer ................... 359
Send Break Character Sequence ............................. 305
SPI Master Mode (CKE = 1, SMP = 1) .....................367
SPI Mode (Master Mode) .......................................... 239
SPI Slave Mode (CKE = 0) ....................................... 368
SPI Slave Mode (CKE = 1) ....................................... 368
Synchronous Reception (Master Mode, SREN) ....... 309
Synchronous Transmission....................................... 307
Synchronous Transmission (Through TXEN) ........... 307
Timer0 and Timer1 External Clock ...........................361
Timer1 Incrementing Edge........................................183
Two Speed Start-up .................................................... 66
USART Synchronous Receive (Master/Slave) ......... 366
USART Synchronous Transmission (Master/Slave). 365
Wake-up from Interrupt............................................. 100
Timing Diagrams and Specifications
PLL Clock ................................................................. 357
Timing Parameter Symbology .......................................... 355
Timing Requirements
I
2
C Bus Data............................................................. 371
I2C Bus Start/Stop Bits............................................. 370
SPI Mode .................................................................. 369
TMR0 Register.................................................................... 31
TMR1H Register ................................................................. 31
TMR1L Register.................................................................. 31
TMR2 Register.................................................................... 31
TRIS.................................................................................. 340
TRISA Register........................................................... 32, 126
TRISC Register........................................................... 32, 130
Two-Speed Clock Start-up Mode........................................ 65
TXREG ............................................................................. 287
TXREG Register................................................................. 34
TXSTA Register.................................................................. 34
BRGH Bit .................................................................. 297
U
USART
Synchronous Master Mode
Requirements, Synchronous Receive .............. 366
Requirements, Synchronous Transmission...... 366
Timing Diagram, Synchronous Receive ........... 366
Timing Diagram, Synchronous Transmission... 365
V
VREF. SEE ADC Reference Voltage
W
Wake-up on Break ............................................................ 303
Wake-up Using Interrupts ................................................. 100
Watchdog Timer (WDT)...................................................... 81
Modes ....................................................................... 104
Specifications ........................................................... 361
WCOL ....................................................... 265, 267, 269, 271
WCOL Status Flag.................................... 265, 267, 269, 271
WDTCON Register ........................................................... 105
WPUB Register................................................................. 128
WPUC Register ................................................................ 131
Write Protection .................................................................. 53
WWW Address ................................................................. 433
WWW, On-Line Support ....................................................... 9