Datasheet

2010-2012 Microchip Technology Inc. DS41413C-page 39
PIC12(L)F1822/PIC16(L)F1823
Bank 8
400h
(1)
INDF0 Addressing this location uses contents of FSR0H/FSR0L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
401h
(1)
INDF1 Addressing this location uses contents of FSR1H/FSR1L to address data memory
(not a physical register)
xxxx xxxx xxxx xxxx
402h
(1)
PCL Program Counter (PC) Least Significant Byte 0000 0000 0000 0000
403h
(1)
STATUS —TOPD ZDCC---1 1000 ---q quuu
404h
(1)
FSR0L Indirect Data Memory Address 0 Low Pointer 0000 0000 uuuu uuuu
405h
(1)
FSR0H Indirect Data Memory Address 0 High Pointer 0000 0000 0000 0000
406h
(1)
FSR1L Indirect Data Memory Address 1 Low Pointer 0000 0000 uuuu uuuu
407h
(1)
FSR1H Indirect Data Memory Address 1 High Pointer 0000 0000 0000 0000
408h
(1)
BSR BSR<4:0> ---0 0000 ---0 0000
409h
(1)
WREG Working Register 0000 0000 uuuu uuuu
40Ah
(1)
PCLATH Write Buffer for the upper 7 bits of the Program Counter -000 0000 -000 0000
40Bh
(1)
INTCON GIE PEIE TMR0IE INTE IOCIE TMR0IF INTF IOCIF 0000 000x 0000 000u
40Ch
Unimplemented
40Dh
Unimplemented
40Eh
Unimplemented
40Fh
Unimplemented
410h
Unimplemented
411h
Unimplemented
412h
Unimplemented
413h
Unimplemented
414h
Unimplemented
415h
Unimplemented
416h
Unimplemented
417h
Unimplemented
418h
Unimplemented
419h
Unimplemented
41Ah
Unimplemented
41Bh
Unimplemented
41Ch
Unimplemented
41Dh
Unimplemented
41Eh
Unimplemented
41Fh
Unimplemented
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Address Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on all
other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: PIC16(L)F1823 only.
3: Unimplemented. Read as ‘1’.