Datasheet
2010-2012 Microchip Technology Inc. DS41413C-page 167
PIC12(L)F1822/PIC16(L)F1823
FIGURE 19-3: COMPARATOR 1 AND 2 MODULES SIMPLIFIED BLOCK DIAGRAM
(PIC16(L)F1823)
Note 1: When CxON = 0, the Comparator will produce a ‘0’ at the output.
2: When CxON = 0, all multiplexer inputs are disconnected.
3: Output of comparator can be frozen during debugging.
MUX
Cx
(3)
0
1
2
3
CxON
(1)
CxNCH<1:0>
2
0
1
CXPCH<1:0>
C12IN1-
C12IN2-
C12IN3-
CXIN+
MUX
-
+
CxVN
CxVP
CXOUT
To ECCP PWM Logic
Q1
D
EN
Q
C
XPOL
MCXOUT
Set CxIF
0
1
CXSYNC
CXOE
CXOUT
DQ
SYNCCXOUT
DAC
FVR Buffer2
C12IN0-
2
CxSP
CxHYS
det
Interrupt
det
Interrupt
CxINTN
CxINTP
To D a ta B us
2
3
VSS
TRIS bit
CxON
(2)
(2)
(from Timer1)
T1CLK
To Timer1 or SR Latch