Datasheet
PIC12(L)F1822/PIC16(L)F1823
DS41413C-page 160 2010-2012 Microchip Technology Inc.
FIGURE 18-1: SR LATCH SIMPLIFIED BLOCK DIAGRAM
SRPS
S
R
Q
Q
Note 1: If R = 1 and S = 1 simultaneously, Q = 0, Q = 1
2: Pulse generator causes a 1 Q-state pulse width.
3: Name denotes the connection point at the comparator output.
4: PIC16(L)F1823 only.
Pulse
Gen
(2)
SR
Latch
(1)
SRQEN
SRSPE
SRSC2E
(4)
SRSCKE
SRCLK
SYNCC2OUT
(3, 4)
SRSC1E
SYNCC1OUT
(3)
SRPR
Pulse
Gen
(2)
SRRPE
SRRC2E
(4)
SRRCKE
SRCLK
SYNCC2OUT
(3, 4)
SRRC1E
SYNCC1OUT
(3)
SRLEN
SRNQEN
SRLEN
SRQ
SRNQ
SRI
SRI