Datasheet

 2012 Microchip Technology Inc. Preliminary DS41637B-page 289
PIC16(L)F1784/6/7
25.3.7 OPERATION IN SLEEP MODE
In Sleep mode, the TMR2 register will not increment
and the state of the module will not change. If the CCPx
pin is driving a value, it will continue to drive that value.
When the device wakes up, TMR2 will continue from its
previous state.
25.3.8 CHANGES IN SYSTEM CLOCK
FREQUENCY
The PWM frequency is derived from the system clock
frequency. Any changes in the system clock frequency
will result in changes to the PWM frequency. See
Section 6.0 “Oscillator Module (with Fail-Safe
Clock Monitor)”
for additional details.
25.3.9 EFFECTS OF RESET
Any Reset will force all ports to Input mode and the
CCP registers to their Reset states.
TABLE 25-3: SUMMARY OF REGISTERS ASSOCIATED WITH STANDARD PWM
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
APFCON1 C2OUTSEL CC1PSEL SDOSEL SCKSEL SDISEL TXSEL RXSEL CCP2SEL
131
APFCON2
— — — — — — — CCP3SEL
131
CCP1CON
P1M<1:0> DC1B<1:0> CCP1M<3:0>
290
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF
94
PIE1
TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE
94
PIE2
OSFIE C2IE C1IE EEIE BCL1IE C4IE C3IE CCP2IE
96
PIR1
TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF
98
PIR2
OSFIF C2IF C1IF EEIF BCL1IF C4IF C3IF CCP2IF
99
PR2
Timer2 Period Register 219*
T2CON
— T2OUTPS<3:0> TMR2ON T2CKPS<1:0>
221
TMR2 Timer2 Module Register
219
TRISA
TRISA7 TRISA6 TRISA5 TRISA4 TRISA3 TRISA2 TRISA1 TRISA0 134
Legend: — = Unimplemented location, read as ‘0’. Shaded cells are not used by the PWM.
* Page provides register information.