Datasheet

PIC16(L)F1784/6/7
DS41637B-page 148 Preliminary  2012 Microchip Technology Inc.
13.9 PORTD Registers
(PIC16(L)F1784/7 only)
13.9.1 DATA REGISTER
PORTD is an 8-bit wide bidirectional port. The
corresponding data direction register is TRISD
(Register 13-27). Setting a TRISD bit (= 1) will make the
corresponding PORTD pin an input (i.e., put the
corresponding output driver in a High-Impedance mode).
Clearing a TRISD bit (= 0) will make the corresponding
PORTD pin an output (i.e., enable the output driver and
put the contents of the output latch on the selected pin).
Example 13-1 shows how to initialize an I/O port.
Reading the PORTD register (Register 13-26) reads the
status of the pins, whereas writing to it will write to the
PORT latch. All write operations are read-modify-write
operations. Therefore, a write to a port implies that the
port pins are read, this value is modified and then written
to the PORT data latch (LATD).
13.9.2 DIRECTION CONTROL
The TRISD register (Register 13-27) controls the
PORTD pin output drivers, even when they are being
used as analog inputs. The user should ensure the bits in
the TRISD register are maintained set when using them
as analog inputs. I/O pins configured as analog inputs
always read ‘0’.
13.9.3 OPEN DRAIN CONTROL
The ODCOND register (Register 13-31) controls the
open-drain feature of the port. Open drain operation is
independently selected for each pin. When an
ODCOND bit is set, the corresponding port output
becomes an open drain driver capable of sinking
current only. When an ODCOND bit is cleared, the
corresponding port output pin is the standard push-pull
drive capable of sourcing and sinking current.
13.9.4 SLEW RATE CONTROL
The SLRCOND register (Register 13-32) controls the
slew rate option for each port pin. Slew rate control is
independently selectable for each port pin. When an
SLRCOND bit is set, the corresponding port pin drive is
slew rate limited. When an SLRCOND bit is cleared,
The corresponding port pin drive slews at the maximum
rate possible.
13.9.5 INPUT THRESHOLD CONTROL
The INLVLD register (Register 13-33) controls the input
voltage threshold for each of the available PORTD
input pins. A selection between the Schmitt Trigger
CMOS or the TTL Compatible thresholds is available.
The input threshold is important in determining the
value of a read of the PORTD register and also the
level at which an interrupt-on-change occurs, if that
feature is enabled. See Section 30.1 “DC Character-
istics: PIC16(L)F1784/6/7-I/E (Industrial,
Extended)” for more information on threshold levels.
13.9.6 PORTD FUNCTIONS AND OUTPUT
PRIORITIES
Each PORTD pin is multiplexed with other functions. The
pins, their combined functions and their output priorities
are shown in Table 13-9.
When multiple outputs are enabled, the actual pin
control goes to the peripheral with the highest priority.
Analog input and some digital input functions are not
included in the list below. These input functions can
remain active when the pin is configured as an output.
Certain digital input functions override other port
functions and are included in the priority list.
Note: Changing the input threshold selection
should be performed while all peripheral
modules are disabled. Changing the
threshold level during the time a module is
active may inadvertently generate a tran-
sition associated with an input pin, regard-
less of the actual voltage level on that pin.
TABLE 13-9: PORTD OUTPUT PRIORITY
Pin Name Function Priority
(1)
RD0 RD0
RD1 OPA3OUT
RD1
RD2 RD2
RD3 RD3
RD4 PSMC3F
RD4
RD5 PSMC3E
RD5
RD6 PSMC3D
C3OUT
RD6
RD7 PSMC3C
C4OUT
RD7
Note 1: Priority listed from highest to lowest.