Datasheet
PIC16(L)F1784/6/7
DS41637B-page 468 Preliminary 2012 Microchip Technology Inc.
External Modes ........................................................... 69
EC.......................................................................69
HS.......................................................................69
LP........................................................................69
OST..................................................................... 70
RC....................................................................... 72
XT ....................................................................... 69
Internal Modes ............................................................ 72
HFINTOSC.......................................................... 73
Internal Oscillator Clock Switch Timing...............75
LFINTOSC ..........................................................73
MFINTOSC ......................................................... 73
Clock Switching................................................................... 77
CMOUT Register............................................................... 201
CMxCON0 Register ..........................................................199
CMxCON1 Register ..........................................................200
Code Examples
ADC Conversion .......................................................173
Changing Between Capture Prescalers .................... 282
Initializing PORTA.....................................................132
Write Verify ............................................................... 124
Writing to Flash Program Memory ............................122
Comparator
Associated Registers ................................................ 201
Operation .................................................................. 193
Comparator Module .......................................................... 193
Cx Output State Versus Input Conditions ................. 195
Comparator Specifications ................................................415
Comparators
C2OUT as T1 Gate ...................................................209
Compare Module.
See Capture/Compare/PWM (CCP)
CONFIG1 Register.............................................................. 54
CONFIG2 Register.............................................................. 56
Configuration as OPAMP or Comparator..........................186
Core Function Register .......................................................36
Customer Change Notification Service ............................. 475
Customer Notification Service...........................................475
Customer Support ............................................................. 475
D
DACCON0 (DAC Converter Control 0) Register............... 192
DACCON1 (DAC Converter Control 1) Register............... 192
Data EEPROM Memory....................................................115
Associated Registers ................................................ 127
Code Protection ........................................................ 116
Reading..................................................................... 116
Writing .......................................................................116
Data Memory....................................................................... 26
DC and AC Characteristics ............................................... 423
Graphs and Tables ................................................... 423
DC Characteristics
Extended and Industrial ............................................ 401
Industrial and Extended ............................................ 394
Development Support ....................................................... 441
Device Configuration........................................................... 53
Code Protection .......................................................... 57
Configuration Word .....................................................53
User ID ..................................................................57, 58
Device ID Register ..............................................................58
Device Overview ......................................... 15, 109, 223, 224
Digital-to-Analog Converter (DAC).................................... 189
Associated Registers ................................................ 192
Effects of a Reset...................................................... 190
Specifications............................................................416
E
EEADR Registers ............................................................. 115
EEADRH Registers........................................................... 115
EEADRL Register............................................................. 125
EEADRL Registers ........................................................... 115
EECON1 Register..................................................... 115, 126
EECON2 Register..................................................... 115, 127
EEDATH Register............................................................. 125
EEDATL Register ............................................................. 125
EEPROM Data Memory
Avoiding Spurious Write ........................................... 116
Write Verify ............................................................... 124
Effects of Reset
PWM mode............................................................... 289
Electrical Specifications (PIC16F/LF1933) ....................... 391
Enhanced Mid-Range CPU ................................................ 21
Enhanced Universal Synchronous Asynchronous
Receiver Transmitter (EUSART) .............................. 345
Errata .................................................................................. 14
EUSART ........................................................................... 345
Associated Registers
Baud Rate Generator ....................................... 359
Asynchronous Mode ................................................. 347
12-bit Break Transmit and Receive .................. 366
Associated Registers
Receive .................................................... 353
Transmit.................................................... 349
Auto-Wake-up on Break ................................... 364
Baud Rate Generator (BRG) ............................ 358
Clock Accuracy................................................. 354
Receiver ........................................................... 350
Setting up 9-bit Mode with Address Detect ...... 352
Transmitter ....................................................... 347
Baud Rate Generator (BRG)
Auto Baud Rate Detect..................................... 363
Baud Rate Error, Calculating............................ 358
Baud Rates, Asynchronous Modes .................. 360
Formulas........................................................... 359
High Baud Rate Select (BRGH Bit) .................. 358
Synchronous Master Mode............................... 367, 371
Associated Registers
Receive .................................................... 370
Transmit.................................................... 368
Reception ......................................................... 369
Transmission .................................................... 367
Synchronous Slave Mode
Associated Registers
Receive .................................................... 372
Transmit.................................................... 371
Reception ......................................................... 372
Transmission .................................................... 371
Extended Instruction Set
ADDFSR................................................................... 381
F
Fail-Safe Clock Monitor ...................................................... 80
Fail-Safe Condition Clearing....................................... 80
Fail-Safe Detection ..................................................... 80
Fail-Safe Operation..................................................... 80
Reset or Wake-up from Sleep .................................... 80
Firmware Instructions ....................................................... 377
Fixed Voltage Reference (FVR)
Associated Registers................................................ 163
Flash Program Memory .................................................... 115
Erasing ..................................................................... 120