Datasheet

 2012 Microchip Technology Inc. Preliminary DS41637B-page 43
PIC16(L)F1784/6/7
Bank 16 (Continued)
85Eh PSMC3ASDL
— — — — — — P3ASDLB P3ASDLA ---- --00 ---- --00
85Fh PSMC3ASDS P3ASDSIN
— — P3ASDSC4 P3ASDSC3 P3ASDSC2 P3ASDSC1 — 0--0 000- 0--0 000-
860h PSMC3INT P3TOVIE P3TPHIE P3TDCIE P3TPRIE P3TOVIF P3TPHIF P3TDCIF P3TPRIF 0000 0000
0000 0000
861h PSMC3PHL Phase Low Count 0000 0000 0000 0000
862h PSMC3PHH Phase High Count 0000 0000 0000 0000
863h PSMC3DCL Duty Cycle Low Count 0000 0000 0000 0000
864h PSMC3DCH Duty Cycle High Count 0000 0000 0000 0000
865h PSMC3PRL Period Low Count 0000 0000 0000 0000
866h PSMC3PRH Period High Count 0000 0000 0000 0000
867h PSMC3TMRL Time base Low Counter 0000 0001 0000 0001
868h PSMC3TMRH Time base High Counter 0000 0000 0000 0000
869h PSMC3DBR Rising Edge Dead-band Counter 0000 0000 0000 0000
86Ah PSMC3DBF Falling Edge Dead-band Counter 0000 0000 0000 0000
86Bh PSMC3BLKR Rising Edge Blanking Counter 0000 0000 0000 0000
86Ch PSMC3BLKF Falling Edge Blanking Counter 0000 0000 0000 0000
86Dh PSMC3FFA
— — — — Fractional Frequency Adjust Register ---- 0000 ---- 0000
86Eh PSMC3STR0
— — — — — — P3STRB P3STRA ---- --01 ---- --01
86Fh PSMC3STR1 P3SSYNC
— — — — — P3LSMEN P3HSMEN 0--- --00 0--- --00
Bank 17-30
x0Ch
or
x8Ch
to
x1Fh
or
x9Fh
— Unimplemented — —
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)(CONTINUED)
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: Unimplemented, read as ‘1’.