Datasheet
PIC16(L)F1782/3
DS41579D-page 390 Preliminary 2011-2012 Microchip Technology Inc.
TABLE 30-8: PIC16(L)F1782/3 ADC CONVERTER (ADC) 12-BIT DIFFERENTIAL CHARACTERISTICS:
TABLE 30-9: PIC16(L)F1782/3 ADC CONVERSION REQUIREMENTS
Operating Conditions
VDD = 3V, Temp. = 25°C, Single-ended 2 s TAD, VREF+ = 3V, VREF- = VSS
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
AD01 NR Resolution — — 10 bit
AD02 E
IL Integral Error — ±1 ±1.6 LSb
AD03 E
DL Differential Error — ±1 ±1.4 LSb No missing codes
AD04 E
OFF Offset Error — ±1 ±3 LSb
AD05 E
GN Gain Error — ±1 ±2 LSb
AD06 V
REF Reference Voltage
(3)
1.8 — VDD VVREF = (VREF+ minus VREF-) (Note 5)
AD07 V
AIN Full-Scale Range — — VREF V
AD08 Z
AIN Recommended Impedance of
Analog Voltage Source
—— 10
k
Can go higher if external 0.01F capacitor is
present on input pin.
AD09 N
R Resolution — — 12 bit
AD10 E
IL Integral Error — ±2 — LSb
AD11 E
DL Differential Error — ±2 — LSb
AD12 E
OFF Offset Error — ±1 — LSb
AD13 E
GN Gain Error — ±1 — LSb
AD14 V
REF Reference Voltage
(3)
1.8 — VDD VVREF = (VREF+ minus VREF-) (Note 5)
AD15 V
AIN Full-Scale Range — — VREF V
AD16 Z
AIN Recommended Impedance of
Analog Voltage Source
—— 10
k
Can go higher if external 0.01F capacitor is
present on input pin.
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: Total Absolute Error includes integral, differential, offset and gain errors.
2: The ADC conversion result never decreases with an increase in the input voltage and has no missing codes.
3: ADC VREF is from external VREF, VDD pin or FVR, whichever is selected as reference input.
4: When ADC is off, it will not consume any current other than leakage current. The power-down current specification
includes any such leakage from the ADC module.
5: FVR voltage selected must be 2.048V or 4.096V.
Standard Operating Conditions (unless otherwise stated)
Operating temperature -40°C TA +125°C
Param
No.
Sym. Characteristic Min. Typ† Max. Units Conditions
AD130* TAD ADC Clock Period 1.0 — 9.0 sTOSC-based
ADC Internal RC Oscillator
Period
1.0 1.6 6.0
s ADCS<1:0> = 11 (ADRC mode)
AD131 T
CNV Conversion Time (not including
Acquisition Time)
(1)
— 15 (12-bit)
13 (10-bit)
—TAD Set GO/DONE bit to conversion
complete
AD132* T
ACQ Acquisition Time — 5.0 — s
* These parameters are characterized but not tested.
† Data in “Typ” column is at 3.0V, 25°C unless otherwise stated. These parameters are for design guidance only and are not
tested.
Note 1: The ADRES register may be read on the following TCY cycle.