Datasheet

PIC16(L)F1782/3
DS41579D-page 34 Preliminary 2011-2012 Microchip Technology Inc.
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
Bank 16 (Continued)
831h PSMC2CON PSMC2EN PSMC2LD PSMC2DBFE PSMC2DBRE P2MODE<3:0> 0000 0000 0000 0000
832h PSMC2MDL P2MDLEN P2MDLPOL P2MDLBIT
P2MSRC<3:0> 000- 0000 000- 0000
833h PSMC2SYNC
P2SYNC<1:0> ---- --00 ---- --00
834h PSMC2CLK
P2CPRE<1:0> P2CSRC<1:0> --00 --00 --00 --00
835h PSMC2OEN
P2OEB P2OEA ---- --00 ---- --00
836h PSMC2POL
—P2INPOL P2POLB P2POLA -0-- --00 -0-- --00
837h PSMC2BLNK
P2FEBM<1:0> P2REBM<1:0> --00 --00 --00 --00
838h PSMC2REBS P2REBIN
P2REBSC3 P2REBSC2 P2REBSC1 0--- 000- 0000 000-
839h PSMC2FEBS P2FEBIN
P2FEBSC3 P2FEBSC2 P2FEBSC1 0--- 000- 0000 000-
83Ah PSMC2PHS P2PHSIN
P2PHSC3 P2PHSC2 P2PHSC1 P2PHST 0--- 0000 0--- 0000
83Bh PSMC2DCS P2DCSIN
P2DCSC3 P2DCSC2 P2DCSC1 P2DCST 0--- 0000 0--- 0000
83Ch PSMC2PRS P2PRSIN
P2PRSC3 P2PRSC2 P2PRSC1 P2PRST 0--- 0000 0--- 0000
83Dh PSMC2ASDC P2ASE P2ASDEN P2ARSEN
P2ASDOV 000- ---0 000- ---0
83Eh PSMC2ASDL
P2ASDLF P2ASDLE P2ASDLD P2ASDLC P2ASDLB P2ASDLA --00 0000 --00 0000
83Fh PSMC2ASDS P2ASDSIN
P2ASDSC3 P2ASDSC2 P2ASDSC1 0--- 000- 0--- 000-
840h PSMC2INT P2TOVIE P2TPHIE P2TDCIE P2TPRIE P2TOVIF P2TPHIF P2TDCIF P2TPRIF 0000 0000
0000 0000
841h PSMC2PHL Phase Low Count 0000 0000 0000 0000
842h PSMC2PHH Phase High Count 0000 0000 0000 0000
843h PSMC2DCL Duty Cycle Low Count 0000 0000 0000 0000
844h PSMC2DCH Duty Cycle High Count 0000 0000 0000 0000
845h PSMC2PRL Period Low Count 0000 0000 0000 0000
846h PSMC2PRH Period High Count 0000 0000 0000 0000
847h PSMC2TMRL Time base Low Counter 0000 0001 0000 0001
848h PSMC2TMRH Time base High Counter 0000 0000 0000 0000
849h PSMC2DBR rising Edge Dead-band Counter 0000 0000 0000 0000
84Ah PSMC2DBF Falling Edge Dead-band Counter 0000 0000 0000 0000
84Bh PSMC2BLKR rising Edge Blanking Counter 0000 0000 0000 0000
84Ch PSMC2BLKF Falling Edge Blanking Counter 0000 0000 0000 0000
84Dh PSMC2FFA
Fractional Frequency Adjust Register ---- 0000 ---- 0000
84Eh PSMC2STR0
P2STRB P2STRA ---- --01 ---- --01
84Fh PSMC2STR1 P2SYNC
P2LSMEN P2HSMEN 0--- --00 0--- --00
850h
86Fh
Unimplemented
Bank 17-30
x0Ch
or
x8Ch
to
x1Fh
or
x9Fh
Unimplemented
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as 0’.
Note 1: These registers can be addressed from any bank.
2: Unimplemented, read as ‘1’.