Datasheet
2011-2012 Microchip Technology Inc. Preliminary DS41579D-page 33
PIC16(L)F1782/3
Bank 16
80Ch
—
810h
— Unimplemented — —
811h PSMC1CON PSMC1EN PSMC1LD PSMC1DBFE PSMC1DBRE P1MODE<3:0> 0000 0000 0000 0000
812h PSMC1MDL P1MDLEN P1MDLPOL P1MDLBIT
— P1MSRC<3:0> 000- 0000 000- 0000
813h PSMC1SYNC
— — — — — — P1SYNC<1:0> ---- --00 ---- --00
814h PSMC1CLK
— — P1CPRE<1:0> — — P1CSRC<1:0> --00 --00 --00 --00
815h PSMC1OEN
— — P1OEF P1OEE P1OED P1OEC P1OEB P1OEA --00 0000 --00 0000
816h PSMC1POL
— P1INPOL P1POLF P1POLE P1POLD P1POLC P1POLB P1POLA -000 0000 -000 0000
817h PSMC1BLNK
— — P1FEBM<1:0> — — P1REBM<1:0> --00 --00 --00 --00
818h PSMCIREBS P1REBIN
— — — P1REBSC3 P1REBSC2 P1REBSC1 — 0--- 000- 0000 000-
819h PSMCIFEBS P1FEBIN
— — — P1FEBSC3 P1FEBSC2 P1FEBSC1 — 0--- 000- 0000 000-
81Ah PSMC1PHS P1PHSIN
— — — P1PHSC3 P1PHSC2 P1PHSC1 P1PHST 0--- 0000 0--- 0000
81Bh PSMC1DCS P1DCSIN
— — — P1DCSC3 P1DCSC2 P1DCSC1 P1DCST 0--- 0000 0--- 0000
81Ch PSMC1PRS P1PRSIN
— — — P1PRSC3 P1PRSC2 P1PRSC1 P1PRST 0--- 0000 0--- 0000
81Dh PSMC1ASDC P1ASE P1ASDEN P1ARSEN
— — — — P1ASDOV 000- ---0 000- ---0
81Eh PSMC1ASDL
— — P1ASDLF P1ASDLE P1ASDLD P1ASDLC P1ASDLB P1ASDLA --00 0000 --00 0000
81Fh PSMC1ASDS P1ASDSIN
— — — P1ASDSC3 P1ASDSC2 P1ASDSC1 — 0--- 000- 0--- 000-
820h PSMC1INT P1TOVIE P1TPHIE P1TDCIE P1TPRIE P1TOVIF P1TPHIF P1TDCIF P1TPRIF 0000 0000
0000 0000
821h PSMC1PHL Phase Low Count 0000 0000 0000 0000
822h PSMC1PHH Phase High Count 0000 0000 0000 0000
823h PSMC1DCL Duty Cycle Low Count 0000 0000 0000 0000
824h PSMC1DCH Duty Cycle High Count 0000 0000 0000 0000
825h PSMC1PRL Period Low Count 0000 0000 0000 0000
826h PSMC1PRH Period High Count 0000 0000 0000 0000
827h PSMC1TMRL Time base Low Counter 0000 0001 0000 0001
828h PSMC1TMRH Time base High Counter 0000 0000 0000 0000
829h PSMC1DBR rising Edge Dead-band Counter 0000 0000 0000 0000
82Ah PSMC1DBF Falling Edge Dead-band Counter 0000 0000 0000 0000
82Bh PSMC1BLKR rising Edge Blanking Counter 0000 0000 0000 0000
82Ch PSMC1BLKF Falling Edge Blanking Counter 0000 0000 0000 0000
82Dh PSMC1FFA
— — — — Fractional Frequency Adjust Register ---- 0000 ---- 0000
82Eh PSMC1STR0
— — P1STRF P1STRE P1STRD P1STRC P1STRB P1STRA --00 0001 --00 0001
82Fh PSMC1STR1 P1SYNC
— — — — — P1LSMEN P1HSMEN 0--- --00 0--- --00
830h
— Unimplemented — —
TABLE 3-8: SPECIAL FUNCTION REGISTER SUMMARY (CONTINUED)
Addr Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Value on
POR, BOR
Value on
all other
Resets
Legend: x = unknown, u = unchanged, q = value depends on condition, - = unimplemented, read as ‘0’, r = reserved.
Shaded locations are unimplemented, read as ‘0’.
Note 1: These registers can be addressed from any bank.
2: Unimplemented, read as ‘1’.