Datasheet

 2011-2012 Microchip Technology Inc. Preliminary DS41579D-page 329
PIC16(L)F1782/3
TABLE 27-2: SUMMARY OF REGISTERS ASSOCIATED WITH ASYNCHRONOUS RECEPTION
Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0
Register
on Page
APFCON C2OUTSEL CC1PSEL SDOSEL SCKSEL SDISEL TXSEL RXSEL CCP2SEL 119
BAUDCON
ABDOVF RCIDL — SCKP BRG16 — WUE ABDEN 333
INTCON GIE PEIE
TMR0IE INTE IOCIE TMR0IF INTF IOCIF 84
PIE1
TMR1GIE ADIE RCIE TXIE SSP1IE CCP1IE TMR2IE TMR1IE 85
PIR1
TMR1GIF ADIF RCIF TXIF SSP1IF CCP1IF TMR2IF TMR1IF
88
RCREG EUSART Receive Data Register 326*
RCSTA SPEN
RX9 SREN CREN ADDEN FERR OERR RX9D 332
SPBRGL BRG<7:0> 334
SPBRGH BRG<15:8> 334
TRISC TRISC7 TRISC6
TRISC5 TRISC4 TRISC3 TRISC2 TRISC1 TRISC0 133
TXSTA
CSRC TX9 TXEN SYNC SENDB BRGH TRMT TX9D 331
Legend: — = unimplemented location, read as ‘0’. Shaded cells are not used for asynchronous reception.
* Page provides register information.