Datasheet

PIC16(L)F1782/3
DS41579D-page 262 Preliminary  2011-2012 Microchip Technology Inc.
25.2.4 AUTO-CONVERSION TRIGGER
When Auto-conversion Trigger mode is chosen
(CCPxM<3:0> = 1011), the CCPx module does the
following:
•Resets Timer1
• Starts an ADC conversion if ADC is enabled
The CCPx module does not assert control of the CCPx
pin in this mode.
The Auto-conversion Trigger output of the CCP occurs
immediately upon a match between the TMR1H,
TMR1L register pair and the CCPRxH, CCPRxL
register pair. The TMR1H, TMR1L register pair is not
reset until the next rising edge of the Timer1 clock. The
Auto-conversion Trigger output starts an ADC conver-
sion (if the ADC module is enabled). This allows the
CCPRxH, CCPRxL register pair to effectively provide a
16-bit programmable period register for Timer1.
Refer to
Section 17.2.5 “Auto-Conversion Trigger”
for more information.
25.2.5 COMPARE DURING SLEEP
The Compare mode is dependent upon the system
clock (F
OSC) for proper operation. Since FOSC is shut
down during Sleep mode, the Compare mode will not
function properly during Sleep.
25.2.6 ALTERNATE PIN LOCATIONS
This module incorporates I/O pins that can be moved to
other locations with the use of the alternate pin function
register APFCON. To determine which pins can be
moved and what their default locations are upon a
Reset, see
Section 13.1 “Alternate Pin Function”for
more information.
25.3 PWM Overview
Pulse-Width Modulation (PWM) is a scheme that
provides power to a load by switching quickly between
fully on and fully off states. The PWM signal resembles
a square wave where the high portion of the signal is
considered the on state and the low portion of the signal
is considered the off state. The high portion, also known
as the pulse width, can vary in time and is defined in
steps. A larger number of steps applied, which
lengthens the pulse width, also supplies more power to
the load. Lowering the number of steps applied, which
shortens the pulse width, supplies less power. The
PWM period is defined as the duration of one complete
cycle or the total amount of on and off time combined.
PWM resolution defines the maximum number of steps
that can be present in a single PWM period. A higher
resolution allows for more precise control of the pulse
width time and in turn the power that is applied to the
load.
The term duty cycle describes the proportion of the on
time to the off time and is expressed in percentages,
where 0% is fully off and 100% is fully on. A lower duty
cycle corresponds to less power applied and a higher
duty cycle corresponds to more power applied.
Figure 25-3 shows a typical waveform of the PWM
signal.
25.3.1 STANDARD PWM OPERATION
The standard PWM function described in this section is
available and identical for all CCP modules.
The standard PWM mode generates a Pulse-Width
Modulation (PWM) signal on the CCPx pin with up to 10
bits of resolution. The period, duty cycle, and resolution
are controlled by the following registers:
• PR2 registers
• T2CON registers
• CCPRxL registers
• CCPxCON registers
Figure 25-4 shows a simplified block diagram of PWM
operation.
FIGURE 25-3: CCP PWM OUTPUT SIGNAL
Note 1: The Auto-conversion Trigger from the
CCP module does not set interrupt flag
bit TMR1IF of the PIR1 register.
2: Removing the match condition by
changing the contents of the CCPRxH
and CCPRxL register pair, between the
clock edge that generates the
Auto-conversion Trigger and the clock
edge that generates the Timer1 Reset,
will preclude the Reset from occurring.
Note 1: The corresponding TRIS bit must be
cleared to enable the PWM output on the
CCPx pin.
2: Clearing the CCPxCON register will
relinquish control of the CCPx pin.
Period
Pulse Width
TMR2 = 0
TMR2 = CCPRxH:CCPxCON<5:4>
TMR2 = PR2