Datasheet

PIC16(L)F1782/3
DS41579D-page 250 Preliminary 2011-2012 Microchip Technology Inc.
REGISTER 24-21: PSMCxDCL: PSMC DUTY CYCLE COUNT LOW BYTE REGISTER
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
PSMCxDCL<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0
PSMCxDCL<7:0>: 16-bit Duty Cycle Count Least Significant bits
= PSMCxDC<7:0>
REGISTER 24-22: PSMCxDCH: PSMC DUTY CYCLE COUNT HIGH REGISTER
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
PSMCxDCH<7:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-0
PSMCxDCH<7:0>: 16-bit Duty Cycle Count Most Significant bits
= PSMCxDC<15:8>