Datasheet
2011-2012 Microchip Technology Inc. Preliminary DS41579D-page 25
PIC16(L)F1782/3
TABLE 3-3: PIC16(L)F1782/3 MEMORY MAP (BANKS 0-7)
Legend: = Unimplemented data memory locations, read as ‘0’.
BANK 0 BANK 1 BANK 2 BANK 3 BANK 4 BANK 5 BANK 6 BANK 7
000h
Core Registers
(Tab le 3- 2)
080h
Core Registers
(Tab le 3- 2)
100h
Core Registers
(Table 3-2)
180h
Core Registers
(Table 3-2)
200h
Core Registers
(Table 3-2)
280h
Core Registers
(Table 3-2)
300h
Core Registers
(Table 3-2)
380h
Core Registers
(Table 3-2)
00Bh 08Bh 10Bh 18Bh 20Bh 28Bh 30Bh 38Bh
00Ch PORTA 08Ch TRISA 10Ch LATA 18Ch ANSELA 20Ch WPUA 28Ch ODCONA 30Ch SLRCONA 38Ch INLVLA
00Dh PORTB 08Dh TRISB 10Dh LATB 18Dh ANSELB 20Dh WPUB 28Dh ODCONB 30Dh SLRCONB 38Dh INLVLB
00Eh PORTC 08Eh TRISC 10Eh LATC 18Eh
— 20Eh WPUC 28Eh ODCONC 30Eh SLRCONC 38Eh INLVLC
00Fh
—08Fh—10Fh—18Fh—20Fh—28Fh—30Fh—38Fh—
010h PORTE 090h TRISE 110h
—190h— 210h WPUE 290h — 310h — 390h INLVLE
011h PIR1 091h PIE1 111h CM1CON0 191h EEADRL 211h SSPBUF 291h CCPR1L 311h
— 391h IOCAP
012h PIR2 092h PIE2 112h CM1CON1 192h EEADRH 212h SSPADD 292h CCPR1H 312h
— 392h IOCAN
013h
—093h— 113h CM2CON0 193h EEDATL 213h SSPMSK 293h CCPR1CON 313h — 393h IOCAF
014h PIR4 094h PIE4 114h CM2CON1 194h EEDATH 214h SSPSTAT 294h
— 314h — 394h IOCBP
015h TMR0 095h OPTION_REG 115h CMOUT 195h EECON1 215h SSPCON 295h
— 315h — 395h IOCBN
016h TMR1L 096h PCON 116h BORCON 196h EECON2 216h SSPCON2 296h
— 316h — 396h IOCBF
017h TMR1H 097h WDTCON 117h FVRCON 197h VREGCON 217h SSPCON3 297h
— 317h — 397h IOCCP
018h T1CON 098h OSCTUNE 118h DACCON0 198h
—218h— 298h CCPR2L 318h — 398h IOCCN
019h T1GCON 099h OSCCON 119h DACCON1 199h RCREG 219h
— 299h CCPR2H 319h — 399h IOCCF
01Ah TMR2 09Ah OSCSTAT 11Ah
— 19Ah TXREG 21Ah — 29Ah CCPR2CON 31Ah —39Ah—
01Bh PR2 09Bh ADRESL 11Bh
— 19Bh SPBRG 21Bh —29Bh—31Bh—39Bh—
01Ch T2CON 09Ch ADRESH 11Ch
— 19Ch SPBRGH 21Ch — 29Ch — 31Ch — 39Ch —
01Dh
— 09Dh ADCON0 11Dh APFCON 19Dh RCSTA 21Dh — 29Dh — 31Dh — 39Dh IOCEP
01Eh
— 09Eh ADCON1 11Eh CM3CON0 19Eh TXSTA 21Eh —29Eh—31Eh—39EhIOCEN
01Fh
— 09Fh ADCON2 11Fh CM3CON1 19Fh BAUDCON 21Fh —29Fh—31Fh—39FhIOCEF
020h
General
Purpose
Register
80 Bytes
0A0h
General
Purpose
Register
80 Bytes
120h
General
Purpose
Register
80 Bytes
1A0h
General
Purpose
Register
80 Bytes
(1)
220h
General
Purpose
Register
80 Bytes
(1)
2A0h
General
Purpose
Register
80 Bytes
(1)
320h
General Purpose
Register
32 Bytes
(1)
3A0h
Unimplemented
Read as ‘0’
13Fh
33Fh
140h
340h
Unimplemented
Read as ‘0’
06Fh 0EFh 16Fh 1EFh 26Fh 2EFh
36Fh 3EFh
070h
Common RAM
70h – 7Fh
0F0h
Accesses
70h – 7Fh
170h
Accesses
70h – 7Fh
1F0h
Accesses
70h – 7Fh
270h
Accesses
70h – 7Fh
2F0h
Accesses
70h – 7Fh
370h
Accesses
70h – 7Fh
3F0h
Accesses
70h – 7Fh
07Fh 0FFh 17Fh 1FFh 27Fh 2FFh 37Fh 3FFh