Datasheet

PIC16(L)F1782/3
DS41579D-page 244 Preliminary  2011-2012 Microchip Technology Inc.
REGISTER 24-12: PSMCxDCS: PSMC DUTY CYCLE SOURCE REGISTER
(1)
R/W-0/0 U-0 U-0 U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
PxDCSIN
— — — PxDCSC3 PxDCSC2 PxDCSC1 PxDCST
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7
PxDCSIN: PSMCx Falling Edge Event occurs on PSMCxIN pin
1 = Falling edge event will occur when PSMCxIN pin goes true
0 = PSMCxIN pin will not cause falling edge event
bit 6-4
Unimplemented: Read as ‘0’
bit 3
PxDCSC3: PSMCx Falling Edge Event occurs on sync_C3OUT output
1 = Falling edge event will occur when sync_C3OUT output goes true
0 = sync_C3OUT will not cause falling edge event
bit 2
PxDCSC2: PSMCx Falling Edge Event occurs on sync_C2OUT output
1 = Falling edge event will occur when sync_C2OUT output goes true
0 = sync_C2OUT will not cause falling edge event
bit 1
PxDCSC1: PSMCx Falling Edge Event occurs on sync_C1OUT output
1 = Falling edge event will occur when sync_C1OUT output goes true
0 = sync_C1OUT will not cause falling edge event
bit 0
PxDCST: PSMCx Falling Edge Event occurs on Time Base match
1 = Falling edge event will occur when PSMCxTMR = PSMCxDC
0 = Time base will not cause falling edge event
Note 1: Sources are not mutually exclusive: more than one source can cause a falling edge event.