Datasheet

 2011-2012 Microchip Technology Inc. Preliminary DS41579D-page 241
PIC16(L)F1782/3
REGISTER 24-7: PSMCxPOL: PSMC POLARITY CONTROL REGISTER
U-0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0
— PxPOLIN PxPOLF
(1)
PxPOLE
(1)
PxPOLD
(1)
PxPOLC
(1)
PxPOLB PxPOLA
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7
Unimplemented: Read as ‘0’
bit 6
PxPOLIN: PSMCxIN Polarity bit
1 = PSMCxIN input is active-low
0 = PSMCxIN input is active-high
bit 5-0
PxPOLy: PSMCx Output y Polarity bit
(1)
1 = PWM PSMCx output y is active-low
0 = PWM PSMCx output y is active-high
Note 1: These bits are not implemented on PSMC2.
REGISTER 24-8: PSMCxBLNK: PSMC BLANKING CONTROL REGISTER
U-0 U-0 R/W-0/0 R/W-0/0 U-0 U-0 R/W-0/0 R/W-0/0
— — PxFEBM1 PxFEBM0 — — PxREBM1 PxREBM0
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7-6
Unimplemented: Read as ‘0’
bit 5-4
PxFEBM<1:0> PSMC Falling Edge Blanking Mode bits
11 = Reserved – do not use
10 = Reserved – do not use
01 = Immediate blanking
00 = No blanking
bit 3-2
Unimplemented: Read as ‘0’
bit 1-0
PxREBM<1:0> PSMC Rising Edge Blanking Mode bits
11 = Reserved – do not use
10 = Reserved – do not use
01 = Immediate blanking
00 = No blanking