Datasheet
PIC16(L)F1782/3
DS41579D-page 224 Preliminary 2011-2012 Microchip Technology Inc.
24.3.12 3-PHASE PWM
The 3-Phase mode of operation is used in 3-phase
power supply and motor drive applications configured
as three half-bridges. A half-bridge configuration
consists of two power driver devices in series,
between the positive power rail (high side) and nega-
tive power rail (low side). The three outputs come from
the junctions between the two drivers in each
half-bridge. When the steering control selects a phase
drive, power flows from the positive rail through a
high-side power device to the load and back to the
power supply through a low-side power device.
In this mode of operation, all six PSMC outputs are
used, but only two are active at a time.
The two active outputs consist of a high-side driver
and low-side driver output.
24.3.12.1 Mode Features
• No dead-band control is available
• PWM can be steered to the following six pairs:
- PSMCxA and PSMCxD
- PSMCxA and PSMCxF
- PSMCxC and PSMCxF
- PSMCxC and PSMCxB
- PSMCxE and PSMCxB
- PSMCxE and PSMCxD
24.3.12.2 Waveform Generation
3-phase steering has a more complex waveform
generation scheme than the other modes. There are
several factors which go into what waveforms are
created.
The PSMC outputs are grouped into three sets of
drivers: one for each phase. Each phase has two
associated PWM outputs: one for the high-side drive
and one for the low-side drive.
High Side drives are indicated by 1H, 2H and 3H.
Low Side drives are indicated by 1L, 2L, 3L.
Phase grouping is mapped as shown in Table 24-1.
There are six possible phase drive combinations.
Each phase drive combination activates two of the six
outputs and deactivates the other four. Phase drive is
selected with the steering control as shown in
Table 24-2.
TABLE 24-1: PHASE GROUPING
TABLE 24-2: 3-PHASE STEERING CONTROL
High/Low Side Modulation Enable
It is also possible to enable the PWM output on the low
side or high side drive independently using the
PxLSMEN and PXHSMEN bits of the PSMC Steering
Control 1 (PSMCxSTR1) register (Register 24-31).
When the PxHSMEN bit is set, the active-high side
output listed in Table 24- 2 is modulated using the
normal rising edge and falling edge events.
When the PxLSMEN bit is set, the active-low side
output listed in Table 24- 2 is modulated using the
normal rising edge and falling edge events.
When both the PxHSMEN and PxLSMEN bits are
cleared, the active outputs listed in Table 24-2 go
immediately to the rising edge event states and do not
change.
Rising Edge Event
• Active outputs are set to their active states
Falling Edge Event
• Active outputs are set to their inactive state
PSMC grouping
PSMCxA 1H
PSMCxB 1L
PSMCxC 2H
PSMCxD 2L
PSMCxE 3H
PSMCxF 3L
PSMCxSTR0 Value
(
1
)
PSMC outputs 00h 01h 02h 04h 08h 10h 20h
PSMCxA 1H inactive active active inactive inactive inactive inactive
PSMCxB 1L inactive inactive inactive inactive
active active inactive
PSMCxC 2H inactive inactive inactive
active active inactive inactive
PSMCxD 2L inactive
active inactive inactive inactive inactive active
PSMCxE 3H inactive inactive inactive inactive inactive active active
PSMCxF 3L inactive inactive active active inactive inactive inactive
Note 1: Steering for any value other than those shown will default to the output combination of the Least Significant
steering bit that is set.