Datasheet

PIC16(L)F1782/3
DS41579D-page 210 Preliminary  2011-2012 Microchip Technology Inc.
24.2.8 INPUT BLANKING
Input blanking is a function whereby the inputs from
any selected asynchronous input may be driven
inactive for a short period of time. This is to prevent
electrical transients from the turn-on/off of power
components from generating a false event.
Blanking is initiated by either or both:
• Rising event
• Falling event
Blanked inputs are suppressed from causing all
asynchronous events, including:
•Rising
•Falling
•Period
•Shutdown
Rising edge and falling edge blanking are controlled
independently. The following features are available for
blanking:
• Blanking enable
• Blanking time counters
• Blanking mode
The following Blanking modes are available:
• Blanking disabled
• Immediate blanking
The Falling Edge Blanking mode is set with the
PxFEBM<1:0> bits of the PSMCx Blanking Control
(PSMCxBLNK) register (Register 24-8).
The Rising Edge Blanking mode is set with the
PxREBM<1:0> bits of the PSMCx Blanking Control
(PSMCxBLNK) register (Register 24-8).
24.2.8.1 Blanking Disabled
With blanking disabled, the asynchronous inputs are
passed to the PSMC module without any intervention.
24.2.8.2 Immediate Blanking
With Immediate blanking, a counter is used to
determine the blanking period. The desired blanking
time is measured in psmc_clk periods. A rising edge
event will start incrementing the rising edge blanking
counter. A falling edge event will start incrementing the
falling edge blanking counter.
The rising edge blanking time is set with the PSMC
Rising Edge Blanking Time (PSMCxBLKR) register
(Register 24-28). The inputs to be blanked are
selected with the PSMC Rising Edge Blanked Source
(PSMCxREBS) register (Register 24-9). During rising
edge blanking, the selected blanked sources are
suppressed for falling edge as well as rising edge,
auto-shutdown and period events.
The falling edge blanking time is set with the PSMC
Falling Edge Blanking Time (PSMCxBLKF) register
(Register 24-29). The inputs to be blanked are
selected with the PSMC Falling Edge Blanked Source
(PSMCxFEBS) register (Register 24-10). During
falling edge blanking, the selected blanked sources
are suppressed for rising edge, as well as falling edge,
auto-shutdown, and period events.
The blanking counters are incremented on the rising
edge of psmc_clk. Blanked sources are suppressed
until the counter value equals the blanking time
register causing the blanking to terminate.
As the rising and falling edge events are from
asynchronous inputs, there may be some uncertainty
in the actual blanking time implemented in each cycle.
The maximum uncertainty is equal to one psmc_clk
period.
24.2.9 OUTPUT WAVEFORM
GENERATION
The PSMC PWM output waveform is generated based
upon the different input events. However, there are
several other factors that affect the PWM waveshapes:
• Output Control
- Output Enable
- Output Polarity
• Waveform Mode Selection
• Dead-band Control
• Steering control
24.2.10 OUTPUT CONTROL
24.2.10.1 Output Pin Enable
Each PSMC PWM output pin has individual output
enable control.
When the PSMC output enable control is disabled, the
module asserts no control over the pin. In this state,
the pin can be used for general purpose I/O or other
associate peripheral use.
When the PSMC output enable is enabled, the active
PWM waveform is applied to the pin per the port
priority selection.
PSMC output enable selections are made with the
PSMC Output Enable Control (PSMCxOEN) register
(Register 24-6).
24.2.10.2 Output Steering
PWM output will be presented only on pins for which
output steering is enabled. The PSMC has up to six
PWM outputs. The PWM signal in some modes can be
steered to one or more of these outputs.