Datasheet

 2011-2012 Microchip Technology Inc. Preliminary DS41579D-page 209
PIC16(L)F1782/3
FIGURE 24-3: TIME BASE WAVEFORM GENERATION
24.2.7 ASYNCHRONOUS INPUTS
The PSMC module supports asynchronous inputs
alone or in combination with the synchronous inputs.
asynchronous inputs include:
•Analog
- sync_C1OUT
- sync_C2OUT
- sync_C3OUT
•Digital
- PSMCxIN pin
24.2.7.1 Comparator Inputs
The outputs of any combination of the synchronized
comparators may be used to trigger any of the three
events as well as auto-shutdown.
The event triggers on the rising edge of the compara-
tor output. Except for auto-shutdown, the event input is
not level sensitive.
24.2.7.2 PSMCxIN Pin Input
The PSMCxIN pin may be used to trigger PSMC
events. Data is passed through straight to the PSMC
module without any synchronization to a system clock.
This is so that input blanking may be applied to any
external circuit using the module.
The event triggers on the rising edge of the PSMCxIN
signal.
24.2.7.3 Asynchronous Polarity
Polarity control is available for the period and
duty-cycle asynchronous event inputs. Polarity control
is necessary when the same signal is used as the
source for both events. Inverting the polarity of one
event relative to the other enables starting the period on
one edge of the signal and terminating the duty-cycle
on the opposite edge. Polarity is controlled with the
PxPRPOL and PxDCPOL bits of the PSMCxSYNC
register. Inverting the asynchronous input with these
controls inverts all enabled asynchronous inputs for the
corresponding event.
1
0030h 0000h 0001h 0002h 0003h 0027h 0028h 0029h 0030h 0000h
0002h
0028h
0030h
psmc_clk
Counter
><15:0PSMCxPH
><15:0PSMCxDC
><15:0PSMCxPR
Inputs
Period Event
Rising Edge Event
Falling Edge Event
Output
PWM Output
Period