Datasheet

 2011-2012 Microchip Technology Inc. Preliminary DS41579D-page 157
PIC16(L)F1782/3
REGISTER 17-2: ADCON1: ADC CONTROL REGISTER 1
R/W-0/0 R/W-0/0 R/W-0/0 R/W-0/0 U-0 R/W-0/0 R/W-0/0 R/W-0/0
ADFM ADCS<2:0>
— ADNREF ADPREF<1:0>
bit 7 bit 0
Legend:
R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’
u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets
‘1’ = Bit is set ‘0’ = Bit is cleared
bit 7
ADFM: ADC Result Format Select bit (see Figure 17-3)
1 = 2’s complement format.
0 = Sign-magnitude result format.
bit 6-4
ADCS<2:0>: ADC Conversion Clock Select bits
111 =F
RC (clock supplied from a dedicated FRC oscillator)
110 =F
OSC/64
101 =F
OSC/16
100 =F
OSC/4
011 =F
RC (clock supplied from a dedicated FRC oscillator)
010 =F
OSC/32
001 =F
OSC/8
000 =F
OSC/2
bit 3
Unimplemented: Read as ‘0’
bit 2
ADNREF: ADC Negative Voltage Reference Configuration bit
1 =V
REF- is connected to external VREF- pin
(1)
0 =VREF- is connected to VSS
bit 1-0 ADPREF<1:0>: ADC Positive Voltage Reference Configuration bits
11 =V
REF+ is connected internally to FVR Buffer 1
10 = Reserved
01 =V
REF+ is connected to VREF+ pin
00 =V
REF+ is connected to VDD
Note 1: When selecting the FVR or VREF+ pin as the source of the positive reference, be aware that a minimum
voltage specification exists. See
Section 30.0 “Electrical Specifications” for details.