Datasheet

PIC16(L)F1782/3

DS41579D-page 144 Preliminary  2011-2012 Microchip Technology Inc.

FIGURE 15-1: VOLTAGE REFERENCE BLOCK DIAGRAM

ADFVR<1:0>

CDAFVR<1:0>

FVR BUFFER1

(To ADC Module)

FVR BUFFER2

(To Comparators, DAC)

FVREN

FVRRDY

Any peripheral requiring the

Fixed Reference

(See Table 15-1)

To B OR , L DO

HFINTOSC Enable

HFINTOSC

TABLE 15-1: PERIPHERALS REQUIRING THE FIXED VOLTAGE REFERENCE (FVR)

Peripheral Conditions Description

HFINTOSC FOSC<2:0> = 100 and

IRCF<3:0>

 000x

INTOSC is active and device is not in Sleep

BOR

BOREN<1:0> = 11 BOR always enabled

BOREN<1:0> = 10 and BORFS = 1 BOR disabled in Sleep mode, BOR Fast Start enabled.

BOREN<1:0> = 01 and BORFS = 1 BOR under software control, BOR Fast Start enabled

LDO All PIC16F1782/3 devices, when

VREGPM = 1 and not in Sleep

The device runs off of the ULP regulator when in Sleep mode.

PSMC 64 MHz PxSRC<1:0> 64 MHz clock forces HFINTOSC on during Sleep.