Datasheet

PIC16(L)F1782/3

DS41579D-page 138 Preliminary  2011-2012 Microchip Technology Inc.

TABLE 13-9: SUMMARY OF REGISTERS ASSOCIATED WITH PORTE

U-0 U-0 U-0 U-0 R/W-1/1 U-0 U-0 U-0

— — — —

INLVLE3

— — —

bit 7 bit 0

Legend:

R = Readable bit W = Writable bit U = Unimplemented bit, read as ‘0’

u = Bit is unchanged x = Bit is unknown -n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set ‘0’ = Bit is cleared

bit 7-4 Unimplemented: Read as ‘0’

bit 3 INLVLE3: PORTE Input Level Select bit

1 = ST input used for PORT reads and interrupt-on-change

0 = TTL input used for PORT reads and interrupt-on-change

bit 2-0 Unimplemented: Read as ‘0’

Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0

on Page

ADCON0 ADRMD CHS<4:0> GO/DONE

ADON 156

INLVLE

— — — —INLVLE3— — — 138

PORTE

— — — —RE3— — — 136

TRISE

— — — — —

(1)

— — — 137

WPUE

— — — — WPUE3 — — — 137

Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by

PORTE.

Note 1: Unimplemented, read as ‘1’.